4 search results - page 1 / 1 » Transformation and synthesis of FSMs for low-power gated-clo... |
ISLPED
1995
ACM
13 years 8 months ago
1995
ACM
We present a technique that automatically synthesizes nite state machines with gated clocks to reduce the power dissipation of the nal implementation. We describe a new transfor...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
In this paper, we address the problem of power dissipation minimization in combinational circuits implemented using pass transistor logic (PTL). We transform the problem of power ...
ASPDAC
2010
ACM
13 years 2 months ago
2010
ACM
This paper describes gate work function and oxide thickness tuning to realize novel circuits using dual-Vth independent-gate FinFETs. Dual-Vth FinFETs with independent gates enabl...
ESAS
2004
Springer
13 years 10 months ago
2004
Springer
Abstract. Low power consumption, low gate count, and high throughput are standard design criteria for cryptographic coprocessors designated for resource constrained devices such as...