18 search results - page 1 / 4 » Transformation based communication and clock domain refineme... |
DAC
2002
ACM
14 years 5 months ago
2002
ACM
The ForSyDe methodology has been developed for system level design. In this paper we present formal transformation methods for the refinement of an abstract and formal system mode...
DSD
2006
IEEE
13 years 8 months ago
2006
IEEE
We present a performance-oriented refinement approach that refines a perfectly synchronous communication model onto Network-on-Chip (NoC) communication. We first identify four bas...
DAC
2003
ACM
14 years 5 months ago
2003
ACM
In the Artemis project [13], design space exploration of embedded systems is provided by modeling application behavior and architectural performance constraints separately. Mappin...
DATE
2009
IEEE
13 years 11 months ago
2009
IEEE
—Partial Reconfiguration (PR) of FPGAs presents many opportunities for application design flexibility, enabling tasks to dynamically swap in and out of the FPGA without entire sy...
TCAD
2002
13 years 4 months ago
2002
With the advent of system-on-a-chip design, many application specific integrated circuits (ASICs) now require multiple design clocks that operate asynchronously to each other. This...