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» Uncertainty-aware circuit optimization
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ICEC
1994
147views more  ICEC 1994»
13 years 6 months ago
VLSI Circuit Synthesis Using a Parallel Genetic Algorithm
A parallel implementation of a genetic algorithm used to evolve simple analog VLSI circuits is described. The parallel computer system consisted of twenty distributed SPARC workst...
Mike Davis, Luoping Liu, John G. Elias
ICCAD
1994
IEEE
92views Hardware» more  ICCAD 1994»
13 years 9 months ago
Synthesis of manufacturable analog circuits
? We describe a synthesis system that takes operating range constraints and inter- and intra- circuit parametric manufacturing variations into account while designing a sized and b...
Tamal Mukherjee, L. Richard Carley, Rob A. Rutenba...
GLVLSI
1998
IEEE
129views VLSI» more  GLVLSI 1998»
13 years 9 months ago
Tabu Search Based Circuit Optimization
In this paper we address the problem of optimizing mixed CMOS BiCMOS circuits. The problem is formulated as a constrained combinatorial optimization problem and solved using an ta...
Sadiq M. Sait, Habib Youssef, Munir M. Zahra
DAC
2005
ACM
13 years 7 months ago
Template-driven parasitic-aware optimization of analog integrated circuit layouts
Layout parasitics have great impact on analog circuit performance. This paper presents an algorithm for explicit parasitic control during layout retargeting of analog integrated c...
Sambuddha Bhattacharya, Nuttorn Jangkrajarng, C.-J...
ICCAD
1997
IEEE
137views Hardware» more  ICCAD 1997»
13 years 8 months ago
Optimization techniques for high-performance digital circuits
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
Chandramouli Visweswariah