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» Using SAT-based techniques in power estimation
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FPL
2009
Springer
106views Hardware» more  FPL 2009»
13 years 10 months ago
Low power techniques for Motion Estimation hardware
Motion Estimation (ME) is the most computationally intensive and the most power consuming part of video compression and video enhancement systems. In this paper, we propose a nove...
Caglar Kalaycioglu, Onur C. Ulusel, Ilker Hamzaogl...
ICASSP
2009
IEEE
14 years 2 days ago
ViBE: A powerful random technique to estimate the background in video sequences
Background subtraction is a crucial step in many automatic video content analysis applications. While numerous acceptable techniques have been proposed so far for background extra...
Olivier Barnich, Marc Van Droogenbroeck
ISLPED
1995
ACM
80views Hardware» more  ISLPED 1995»
13 years 9 months ago
Techniques for fast circuit simulation applied to power estimation of CMOS circuits
We present a transistor level power estimator which exploits algorithms for fast circuit simulation to compute the power dissipation of CMOS circuits. The proposed approach uses s...
Premal Buch, Shen Lin, Vijay Nagasamy, Ernest S. K...
ICCAD
1996
IEEE
140views Hardware» more  ICCAD 1996»
13 years 9 months ago
Register-transfer level estimation techniques for switching activity and power consumption
We present techniques for estimating switching activity and power consumption in register-transfer level (RTL) circuits. Previous work on this topic has ignored the presence of gl...
Anand Raghunathan, Sujit Dey, Niraj K. Jha
VLSI
2012
Springer
12 years 27 days ago
A Signature-Based Power Model for MPSoC on FPGA
e technique is based on abstract execution profiles, called event signatures, and it operates at a higher level of abstraction than, for example, commonly used instruction-set sim...
Roberta Piscitelli, Andy D. Pimentel