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ASAP
2005
IEEE
121views Hardware» more  ASAP 2005»
13 years 10 months ago
Using TLM for Exploring Bus-based SoC Communication Architectures
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
Sudeep Pasricha, Mohamed Ben-Romdhane
AHS
2007
IEEE
247views Hardware» more  AHS 2007»
13 years 11 months ago
Hybrid Communication Medium for Adaptive SoC Architectures
This paper proposes a hybrid communication medium for on-chip communication targeting adaptive SoC architectures. Unlike the work carried out in literature, where the term “hybr...
Balal Ahmad, Ali Ahmadinia, Tughrul Arslan
DATE
2003
IEEE
117views Hardware» more  DATE 2003»
13 years 9 months ago
Exploring SW Performance Using SoC Transaction-Level Modeling
This paper presents VISTA, a new methodology and tool dedicated to analyse system level performance by executing full-scale SW application code on a transaction-level model of the...
Imed Moussa, Thierry Grellier, Giang Nguyen
DATE
2004
IEEE
154views Hardware» more  DATE 2004»
13 years 8 months ago
Fast Exploration of Parameterized Bus Architecture for Communication-Centric SoC Design
For successful SoC design, efficient and scalable communication architecture is crucial. Some bus interconnects now provide configurable structures to meet this requirement of an ...
Chulho Shin, Young-Taek Kim, Eui-Young Chung, Kyu-...
ICCAD
2006
IEEE
177views Hardware» more  ICCAD 2006»
14 years 1 months ago
Fast and accurate transaction level models using result oriented modeling
Efficient communication modeling is a critical task in SoC design and exploration. In particular, fast and accurate communication is needed to predict the performance of a system....
Gunar Schirner, Rainer Dömer