26 search results - page 1 / 6 » Using an FPGA for Fast Bit Accurate SoC Simulation |
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
In this paper we describe a sequential simulation method to simulate large parallel homo- and heterogeneous systems on a single FPGA. The method is applicable for parallel systems...
DATE
2002
IEEE
13 years 9 months ago
2002
IEEE
To enable fast and accurate evaluation of HW/SW implementation choices of on-chip communication, we present a method to automatically generate timed OS simulation models. The meth...
VLSID
2002
IEEE
14 years 5 months ago
2002
IEEE
Embedded DRAM (eDRAM) power-energy estimation is presented for system-on-a-chip (SOC) applications. The main feature is the signal swing based analytic (SSBA) model, which improve...
ASAP
2005
IEEE
13 years 10 months ago
2005
IEEE
As billion transistor System-on-chips (SoC) become commonplace and design complexity continues to increase, designers are faced with the daunting task of meeting escalating design...
NOCS
2007
IEEE
13 years 11 months ago
2007
IEEE
Network-on-Chip (NoC) architectures have a wide variety of parameters that can be adapted to the designer’s requirements. Fast exploration of this parameter space is only possib...