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FDL
2004
IEEE
13 years 8 months ago
Real-Time Operating System Services for Realistic SystemC Simulation Models of Embedded Systems
gn process of embedded systems moves currently towards higher levels of abstraction. As a consequence, a need arises for an early and realistic assessment of system level design d...
P. Hastono, Stephan Klaus, Sorin A. Huss
CASES
2005
ACM
13 years 6 months ago
An Esterel processor with full preemption support and its worst case reaction time analysis
The concurrent synchronous language Esterel allows proto treat reactive systems in an abstract, concise manner. An Esterel program is typically first translated into other, non-s...
Xin Li, Jan Lukoschus, Marian Boldt, Michael Harde...
DNA
2008
Springer
13 years 6 months ago
A Simple DNA Gate Motif for Synthesizing Large-Scale Circuits
The prospects of programming molecular systems to perform complex autonomous tasks has motivated research into the design of synthetic biochemical circuits. Of particular interest ...
Lulu Qian, Erik Winfree
DSD
2010
IEEE
144views Hardware» more  DSD 2010»
13 years 4 months ago
On-chip Scan-Based Test Strategy for a Dependable Many-Core Processor Using a NoC as a Test Access Mechanism
—Periodic on-chip scan-based tests have to be applied to a many-core processor SoC to improve its dependability. An infrastructural IP module has been designed and incorporated i...
Xiao Zhang, Hans G. Kerkhoff, Bart Vermeulen
JSA
2007
142views more  JSA 2007»
13 years 4 months ago
Efficient FPGA hardware development: A multi-language approach
This paper presents a multi-language framework to FPGA hardware development which aims to satisfy the dual requirement of high level hardware design and efficient hardware impleme...
Khaled Benkrid, Abdsamad Benkrid, S. Belkacemi