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ISQED
2000
IEEE
131views Hardware» more  ISQED 2000»
13 years 9 months ago
Low Power Testing of VLSI Circuits: Problems and Solutions
Power and energy consumption of digital systems may increase significantly during testing. This extra power consumption due to test application may give rise to severe hazards to ...
Patrick Girard
ISCAS
2006
IEEE
105views Hardware» more  ISCAS 2006»
13 years 11 months ago
A new Spice-oriented frequency-domain optimization technique
— There are many kinds of optimization techniques for designing high-performance RF circuits. In this paper, we propose a new frequency-domain Spice-oriented optimization algorit...
Masayoshi Oda, Yoshihiro Yamagami, Yoshifumi Nishi...
ASPDAC
2007
ACM
136views Hardware» more  ASPDAC 2007»
13 years 9 months ago
Design tool solutions for mixed-signal/RF circuit design in CMOS nanometer technologies
The scaling of CMOS technology into the nanometer era enables the fabrication of highly integrated systems, which increasingly contain analog and/or RF parts. However, scaling into...
Georges G. E. Gielen
ISPD
2005
ACM
188views Hardware» more  ISPD 2005»
13 years 10 months ago
A semi-persistent clustering technique for VLSI circuit placement
Placement is a critical component of today's physical synthesis flow with tremendous impact on the final performance of VLSI designs. However, it accounts for a significant p...
Charles J. Alpert, Andrew B. Kahng, Gi-Joon Nam, S...
MJ
2007
87views more  MJ 2007»
13 years 4 months ago
Using SAT-based techniques in power estimation
Recent algorithmic advances in Boolean satisfiability (SAT), along with highly efficient solver implementations, have enabled the successful deployment of SAT technology in a wi...
Assim Sagahyroon, Fadi A. Aloul