37 search results - page 2 / 8 » Variations-aware low-power design with voltage scaling |
HIPEAC
2009
Springer
13 years 11 months ago
2009
Springer
In this article, we present a parallel implementation of a 1024 point Fast Fourier Transform (FFT) operating with a subthreshold supply voltage, which is below the voltage that tur...
MICRO
2003
IEEE
13 years 10 months ago
2003
IEEE
With increasing clock frequencies and silicon integration, power aware computing has become a critical concern in the design of embedded processors and systems-on-chip. One of the...
DATE
2007
IEEE
13 years 11 months ago
2007
IEEE
: 2-D Discrete Cosine Transform (DCT) is widely used as the core of digital image and video compression. In this paper, we present a novel DCT architecture that allows aggressive v...
DATE
2010
IEEE
13 years 9 months ago
2010
IEEE
— In this paper, we examine the impact of application task mapping on the reliability of MPSoC in the presence of single-event upsets (SEUs). We propose a novel soft erroraware d...
ISLPED
2003
ACM
13 years 10 months ago
2003
ACM
The increasing prominence of portable systems and the need to limit power consumption and hence, heat dissipation in very high density VLSI chips have led to rapid and innovative ...