1093 search results - page 1 / 219 » Verifying VLSI Circuits |
IJCAI
1989
13 years 6 months ago
1989
We apply constraint posting to the problem of reasoning about function from structure. Constraint posting is a technique used by some planners to coordinate decisions. At each dec...
ATVA
2009
Springer
13 years 10 months ago
2009
Springer
ICCAD
2002
IEEE
14 years 2 months ago
2002
IEEE
In this paper we present an advanced functional extraction tool for automatic generation of high-level RTL from switch-level circuit netlist representation. The tool is called FEV...
GLVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
ASPDAC
2008
ACM
13 years 7 months ago
2008
ACM
As VLSI fabrication technology progresses to 65nm feature sizes and smaller, transistors no longer operate as ideal switches. This motivates the verification of digital circuits us...