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» Very Low Voltage Testing of SOI Integrated Circuits
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ISCAS
2008
IEEE
170views Hardware» more  ISCAS 2008»
13 years 11 months ago
Integrated circuit implementation of a cortical neuron
— This paper presents an analogue integrated circuit implementation of a cortical neuron model. The VLSI chip prototype has been implemented in a 0.35 µm CMOS technology. The si...
Jayawan H. B. Wijekoon, Piotr Dudek
SBCCI
2006
ACM
200views VLSI» more  SBCCI 2006»
13 years 10 months ago
A differential switched-capacitor amplifier with programmable gain and output offset voltage
The design of a low-power differential switched-capacitor amplifier for processing a fully-differential input signal coming from a pressure sensor interface is reported. The circu...
Fabio Lacerda, Stefano Pietri, Alfredo Olmos
ITC
1998
IEEE
89views Hardware» more  ITC 1998»
13 years 9 months ago
Detecting resistive shorts for CMOS domino circuits
We investigate defects in CMOS domino gates and derive the test conditions for them. Very-Low-Voltage Testing can improve the defect coverage, which we define as the maximum detec...
Jonathan T.-Y. Chang, Edward J. McCluskey
ISCAS
2008
IEEE
104views Hardware» more  ISCAS 2008»
13 years 11 months ago
An offset compensation technique for bandgap voltage reference in CMOS technology
— A precision integrated bandgap voltage reference in 0.35μm CMOS technology is here presented. The circuit uses natural npn bipolar transistors as reference diodes. A particula...
Stefano Ruzza, Enrico Dallago, Giuseppe Venchi, Se...
ENGL
2007
63views more  ENGL 2007»
13 years 4 months ago
A Full Integrated Gain Variable LNA for WCDMA
—In this paper we propose a gain-variable low noise amplifier (LNA) for low-voltage and low power WCDMA application. The LNA is designed based on a current-reused topology and a ...
Zhi-Ming Lin, Yu-Chun Huang