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» Wave-pipelined on-chip global interconnect
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DAC
2001
ACM
14 years 5 months ago
Route Packets, Not Wires: On-Chip Interconnection Networks
Using on-chip interconnection networks in place of ad-hoc global wiring structures the top level wires on a chip and facilitates modular design. With this approach, system modules...
William J. Dally, Brian Towles
VLSID
2002
IEEE
116views VLSI» more  VLSID 2002»
14 years 5 months ago
Efficient Macromodeling for On-Chip Interconnects
The improved T and improved n models are proposed for onchip interconnect macromodeling. Using global approximations, simple approximation frames are derived and applied to modeli...
Qinwei Xu, Pinaki Mazumder
ISQED
2007
IEEE
206views Hardware» more  ISQED 2007»
13 years 11 months ago
Provisioning On-Chip Networks under Buffered RC Interconnect Delay Variations
Abstract—A Network-on-Chip (NoC) replaces on-chip communication implemented by point-to-point interconnects in a multi-core environment by a set of shared interconnects connected...
Mosin Mondal, Tamer Ragheb, Xiang Wu, Adnan Aziz, ...
ICCAD
2003
IEEE
123views Hardware» more  ICCAD 2003»
14 years 1 months ago
The Y-Architecture for On-Chip Interconnect: Analysis and Methodology
The Y-architecture for on-chip interconnect is based on pervasive use of 0-, 120-, and 240-degree oriented semi-global and global wiring. Its use of three uniform directions explo...
Hongyu Chen, Chung-Kuan Cheng, Andrew B. Kahng, Io...
ISCAS
2007
IEEE
158views Hardware» more  ISCAS 2007»
13 years 11 months ago
Adaptive Low/High Voltage Swing CMOS Driver for On-Chip Interconnects
Abstract— This paper reports the design of a high performance, adaptive low/high swing CMOS driver circuit (mj–driver) suitable for driving of global interconnects with large c...
José C. García, Juan A. Montiel-Nels...