13 search results - page 1 / 3 » Wire Segmenting for Improved Buffer Insertion |
DAC
1997
ACM
13 years 9 months ago
1997
ACM
Buffer insertion seeks to place buffers on the wires of a signal net to minimize delay. Van Ginneken [14] proposed an optimal dynamic programming solution (with extensions propose...
ICCD
2004
IEEE
14 years 1 months ago
2004
IEEE
In this paper, we propose a combined channel segmentation and buffer insertion approach, which minimizes the number of buffers inserted while satisfying the delay constraints for ...
GLVLSI
2009
IEEE
13 years 11 months ago
2009
IEEE
The interconnection delay of pre-fabricated design style dominates circuit delay due to the heavily downstream capacitance. Buffer insertion is a widely used technique to split o...
ASPDAC
2006
ACM
13 years 10 months ago
2006
ACM
— Buffer insertion is an effective technique to reduce interconnect delay. In this paper, we give a simple O(mn) time algorithm for optimal buffer insertion, where m is the numbe...
DAC
2003
ACM
14 years 5 months ago
2003
ACM
The classic algorithm for optimal buffer insertion due to van Ginneken has time and space complexity O(n2 ), where n is the number of possible buffer positions. We present a new a...