15 search results - page 3 / 3 » Wire shaping of RLC interconnects |
ICCAD
2006
IEEE
14 years 1 months ago
2006
IEEE
With shrinking feature size and growing integration density in the Deep Sub-Micron technologies, the global buses are fast becoming the “weakest-links” in VLSI design. They ha...
ISCAS
2006
IEEE
13 years 10 months ago
2006
IEEE
As the operation frequency reaches gigahertz in very deep-submicron designs, the effect of on-chip inductance on circuit performance can no longer be neglected. Therefore, it is d...
DSD
2009
IEEE
13 years 11 months ago
2009
IEEE
Abstract—Pulse-based data transmission has been demonstrated as a power-saving and high performance alternative to level-based signalling over global distances. Key to its correc...
ISVLSI
2006
IEEE
13 years 10 months ago
2006
IEEE
— The effects of parameter variations and crosstalk noise on the clock signal propagating along an H-tree clock distribution network are investigated in this paper. In particular...
DAGSTUHL
2006
13 years 6 months ago
2006
This paper presents a method of constructing pre-routed FPGA cores which lays the foundations for a rapid system construction framework for dynamically reconfigurable computing sy...