15 search results - page 1 / 3 » Wire-Sizing for Delay Minimization and Ringing Control Using... |
DATE
2000
IEEE
13 years 9 months ago
2000
IEEE
DATE
2002
IEEE
13 years 10 months ago
2002
IEEE
In this paper, we address the problem of simultaneous routing and buffer insertion. Recently in [12, 22], the authors considered simultaneous maze routing and buffer insertion und...
TWC
2010
12 years 11 months ago
2010
We investigate the problem of minimizing the overall transmission delay of packets in a multi-access wireless communication system, where the transmitters have average power constr...
ICCAD
1993
IEEE
13 years 9 months ago
1993
IEEE
We have proposed an e cient measure to reduce the clock skew by assigning the clock network with variable branch widths. This measure has long been used for \H" clock tree. T...
TCAD
2002
13 years 4 months ago
2002
As very large scale integration (VLSI) circuit speed rapidly increases, the inductive effects of interconnect lines strongly impact the signal integrity of a circuit. Since these i...