Maze Routing with Buffer Insertion under Transition Time Constraints

In this paper, we address the problem of simultaneous routing and buffer insertion. Recently in [12, 22], the authors considered simultaneous maze routing and buffer insertion under the Elmore delay model. Their algorithms can take into account both routing obstacles and restrictions on buffer locations. It is well known that Elmore delay is only a first-order approximation of signal delay and hence could be very inaccurate. Moreover, we cannot impose constraints on the transition times of the output signal waveform at the sink or at the buffers on the route. In this paper we extend the algorithm in [12] so that accurate delay models (e.g., transmission line model, delay look-up table from SPICE, etc.) can be used. We show that the problem of finding a minimum-delay buffered routing path can be formulated as a shortest path problem in a specially constructed weighted graph. By including only the vertices with qualifying transition times in the graph, we guarantee that all transition...

• Type: Conference
• Year: 2002
• Where: DATE
• Authors: Li-Da Huang, Minghorng Lai, D. F. Wong, Youxin Gao
• Keywords: DATE 2002, Delay Models, Elmore Delay, Hardware, Routing