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» Wire-driven microarchitectural design space exploration
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ISCA
2012
IEEE
224views Hardware» more  ISCA 2012»
11 years 7 months ago
A first-order mechanistic model for architectural vulnerability factor
Soft error reliability has become a first-order design criterion for modern microprocessors. Architectural Vulnerability Factor (AVF) modeling is often used to capture the probab...
Arun A. Nair, Stijn Eyerman, Lieven Eeckhout, Lizy...
FPGA
2006
ACM
178views FPGA» more  FPGA 2006»
13 years 9 months ago
Application-specific customization of soft processor microarchitecture
A key advantage of soft processors (processors built on an FPGA programmable fabric) over hard processors is that they can be customized to suit an application program's spec...
Peter Yiannacouras, J. Gregory Steffan, Jonathan R...
IPPS
2006
IEEE
13 years 11 months ago
Automatic application-specific microarchitecture reconfiguration
Applications for constrained embedded systems are subject to strict time constraints and restrictive resource utilization. With soft core processors, application developers can cu...
Shobana Padmanabhan, Ron K. Cytron, Roger D. Chamb...
ISPASS
2006
IEEE
13 years 11 months ago
Accelerating architectural exploration using canonical instruction segments
Detailed microarchitectural simulators are not well suited for exploring large design spaces due to their excessive simulation times. We introduce AXCIS, a framework for fast and ...
Rose F. Liu, Krste Asanovic
CAL
2006
13 years 5 months ago
Performance modeling using Monte Carlo simulation
Abstract-- Cycle accurate simulation has long been the primary tool for micro-architecture design and evaluation. Though accurate, the slow speed often imposes constraints on the e...
Ram Srinivasan, Jeanine Cook, Olaf M. Lubeck