73 search results - page 2 / 15 » X-architecture placement based on effective wire models |
ICCAD
2006
IEEE
14 years 2 months ago
2006
IEEE
The wire length estimation is the bottleneck of packing based block placers. To cope with this problem, we present a fast wire length estimation method in this paper. The key idea...
DATE
2002
IEEE
13 years 10 months ago
2002
IEEE
In this paper, we show that under the constant delay model the placement problem is equivalent to minimizing a weighted sum of wire lengths. The weights can be efficiently compute...
ASPDAC
2006
ACM
13 years 11 months ago
2006
ACM
—For nanoscale interconnection, the scattering effect will soon become prominent due to scaling. It will increase the effective resistivity and thus interconnection delay signifi...
GLVLSI
2003
IEEE
13 years 10 months ago
2003
IEEE
We propose an approach for reducing the energy consumption of address buses that targets both the switching and the crosstalk components of power dissipation. The method is based ...
TVLSI
2010
12 years 12 months ago
2010
The gap between VLSI technology and fabrication technology leads to strong refractive effects in lithography. Consequently, it is a huge challenge to reliably print layout features...