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ISCAS
2005
IEEE

184views Hardware» more ISCAS 2005»

An adaptive, truly background calibration method for high speed pipeline ADC design

13 years 10 months ago

: This paper presents a self-calibration method for designing high speed pipeline ADCs. Unlike all existing calibration algorithms, the proposed calibration does not insert any tes...

Degang Chen, Zhongjun Yu, Randall L. Geiger

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9

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ISCAS
2005
IEEE

153views Hardware» more ISCAS 2005»

A two-step DDEM ADC for accurate and cost-effective DAC testing

13 years 10 months ago

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— This paper presents a scheme for testing DACs’ static non-linearity errors by using a two-step flash ADC with deterministic dynamic element matching (DDEM). In this work, the...

Hanqing Xing, Degang Chen, Randall L. Geiger

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7

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ISCAS
2005
IEEE

106views Hardware» more ISCAS 2005»

kT/C constrained optimization of power in pipeline ADCs

13 years 10 months ago

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—This paper presents a method to optimize the power consumption of a pipelined ADC with kT/C noise constraint. The total power dependence on capacitor scaling and stage resolutio...

Yu Lin, Vipul Katyal, Mark Schlarmann, Randall L. ...

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6

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DATE
2005
IEEE

96views Hardware» more DATE 2005»

Systematic Figure of Merit Computation for the Design of Pipeline ADC

13 years 10 months ago