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ASPDAC
2010
ACM
161views Hardware» more  ASPDAC 2010»
13 years 2 months ago
A dual-MST approach for clock network synthesis
Abstract--In nanometer-scale VLSI physical design, clock network becomes a major concern on determining the total performance of digital circuit. Clock skew and PVT (Process, Volta...
Jingwei Lu, Wing-Kai Chow, Chiu-Wing Sham, Evangel...
ASPDAC
2009
ACM
152views Hardware» more  ASPDAC 2009»
13 years 11 months ago
A novel Toffoli network synthesis algorithm for reversible logic
—Reversible logic studies have promising potential on energy lossless circuit design, quantum computation, nanotechnology, etc. Reversible logic features a one-to-one input outpu...
Yexin Zheng, Chao Huang
ASPDAC
2009
ACM
115views Hardware» more  ASPDAC 2009»
13 years 11 months ago
Incremental and on-demand random walk for iterative power distribution network analysis
— Power distribution networks (PDNs) are designed and analyzed iteratively. Random walk is among the most efficient methods for PDN analysis. We develop in this paper an increme...
Yiyu Shi, Wei Yao, Jinjun Xiong, Lei He
ASPDAC
2009
ACM
139views Hardware» more  ASPDAC 2009»
13 years 11 months ago
Hardware-dependent software synthesis for many-core embedded systems
Abstract— This paper presents synthesis of Hardware Dependent Software (HdS) for multicore and many-core designs using Embedded System Environment (ESE). ESE is a tool set, devel...
Samar Abdi, Gunar Schirner, Ines Viskic, Hansu Cho...
ASPDAC
2009
ACM
108views Hardware» more  ASPDAC 2009»
13 years 11 months ago
Synthesis of networks on chips for 3D systems on chips
Three-dimensional stacking of silicon layers is emerging as a promising solution to handle the design complexity and heterogeneity of Systems on Chips (SoCs). Networks on Chips (N...
Srinivasan Murali, Ciprian Seiculescu, Luca Benini...