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    DAC
    1995
    ACM
    104views Computer Architecture» more  DAC 1995»
    Synthesis of Software Programs for Embedded Control Applications
    13 years 9 months ago
    Synthesis of Software Programs for Embedded Control Applications
    Download  www.cs.ucr.edu
    — Software components for embedded reactive real-time applications must satisfy tight code size and runtime constraints. Cooperating finite state machines provide a convenient i...
    Massimiliano Chiodo, Paolo Giusto, Attila Jurecska...
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    DAC
    1995
    ACM
    117views Computer Architecture» more  DAC 1995»
    The Elmore Delay as a Bound for RC Trees with Generalized Input Signals
    13 years 9 months ago
    The Elmore Delay as a Bound for RC Trees with Generalized Input Signals
    Download  www.cecs.uci.edu
    The Elmore delay is an extremely popular delay metric, particularly for RC tree analysis. The widespread usage of this metric is mainly attributable to it being the most accurate ...
    Rohini Gupta, Byron Krauter, Bogdan Tutuianu, John...
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    DAC
    1995
    ACM
    111views Computer Architecture» more  DAC 1995»
    Hierarchical Optimization of Asynchronous Circuits
    13 years 9 months ago
    Hierarchical Optimization of Asynchronous Circuits
    Download  cwc.ucsd.edu
    Abstract— Many asynchronous designs are naturally specified and implemented hierarchically as an interconnection of separate asynchronous modules that operate concurrently and c...
    Bill Lin, Gjalt G. de Jong, Tilman Kolks
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    DAC
    1995
    ACM
    130views Computer Architecture» more  DAC 1995»
    Orthogonal Greedy Coupling - A New Optimization Approach to 2-D FPGA Routing
    13 years 9 months ago
    Orthogonal Greedy Coupling - A New Optimization Approach to 2-D FPGA Routing
    Download  www.cecs.uci.edu
    We propose a novel optimization scheme that can improve the routing by reducing a newly observed router decaying effect. A pair of greedy-grow algorithms, each emphasizing a diffe...
    Yu-Liang Wu, Malgorzata Marek-Sadowska
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    DAC
    1995
    ACM
    106views Computer Architecture» more  DAC 1995»
    The Validity of Retiming Sequential Circuits
    13 years 9 months ago
    The Validity of Retiming Sequential Circuits
    Download  www.eecs.berkeley.edu
    Retiming has been proposed as an optimizationstep forsequential circuits represented at the net-list level. Retiming moves the latches across the logic gates and in doing so chang...
    Vigyan Singhal, Carl Pixley, Richard L. Rudell, Ro...
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