Sciweavers

38 search results - page 3 / 8
» glvlsi 2007
Sort
View
GLVLSI
2007
IEEE
115views VLSI» more  GLVLSI 2007»
13 years 11 months ago
Novel architectures for efficient (m, n) parallel counters
Parallel counters are key elements in many arithmetic circuits, especially fast multipliers. In this paper, novel architectures and designs for high speed, low power (3, 2), (7, 3...
Sreehari Veeramachaneni, Lingamneni Avinash, Kirth...
GLVLSI
2007
IEEE
153views VLSI» more  GLVLSI 2007»
13 years 7 months ago
Address generation for nanowire decoders
Nanoscale crossbars built from nanowires can form high density memories and programmable logic devices. To integrate such nanoscale devices with other circuits, nanowire decoders ...
Jia Wang, Ming-Yang Kao, Hai Zhou
GLVLSI
2007
IEEE
154views VLSI» more  GLVLSI 2007»
13 years 11 months ago
A design kit for a fully working shared memory multiprocessor on FPGA
This paper presents a framework to design a shared memory multiprocessor on a programmable platform. We propose a complete flow, composed by a programming model and a template ar...
Antonino Tumeo, Matteo Monchiero, Gianluca Palermo...
GLVLSI
2007
IEEE
162views VLSI» more  GLVLSI 2007»
13 years 11 months ago
Design of an UHF RFID transponder for secure authentication
RFID technology increases rapidly its applicability in new areas of interest without guaranteeing security and privacy issues. This paper presents a new architecture of an RFID tr...
Paolo Bernardi, Filippo Gandino, Bartolomeo Montru...
GLVLSI
2007
IEEE
139views VLSI» more  GLVLSI 2007»
13 years 11 months ago
Synthesis of irregular combinational functions with large don't care sets
A special logic synthesis problem is considered for Boolean functions which have large don’t care sets and are irregular. Here, a function is considered as irregular if the inpu...
Valentin Gherman, Hans-Joachim Wunderlich, R. D. M...