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ISQED
2008
IEEE
92views Hardware» more  ISQED 2008»
14 years 16 days ago
Clock Skew Evaluation Considering Manufacturing Variability in Mesh-Style Clock Distribution
Influence of manufacturing variability on circuit performance has been increasing because of finer manufacturing process and lowered supply voltage. In this paper, we focus on m...
Shinya Abe, Masanori Hashimoto, Takao Onoye
ISQED
2008
IEEE
98views Hardware» more  ISQED 2008»
14 years 16 days ago
Design Margin Exploration of Spin-Torque Transfer RAM (SPRAM)
We proposed a combined magnetic and circuit level technique to explore the design methodology of SpinTorque Transfer RAM (SPRAM). A dynamic magnetic model of magnetic tunneling ju...
Yiran Chen, Xiaobin Wang, Hai Li, Harry Liu, Dimit...
ISQED
2008
IEEE
120views Hardware» more  ISQED 2008»
14 years 16 days ago
Error-Tolerant SRAM Design for Ultra-Low Power Standby Operation
We present an error-tolerant SRAM design optimized for ultra-low standby power. Using SRAM cell optimization techniques, the maximum data retention voltage (DRV) of a 90nm 26kb SR...
Huifang Qin, Animesh Kumar, Kannan Ramchandran, Ja...
ISQED
2008
IEEE
150views Hardware» more  ISQED 2008»
14 years 16 days ago
Dominant Substrate Noise Coupling Mechanism for Multiple Switching Gates
— The dominant substrate noise coupling mechanism is determined for multiple switching gates based on a physically intuitive model. The model exhibits reasonable accuracy as comp...
Emre Salman, Eby G. Friedman, Radu M. Secareanu, O...
ISQED
2008
IEEE
142views Hardware» more  ISQED 2008»
14 years 16 days ago
Clock Skew Analysis via Vector Fitting in Frequency Domain
An efficient frequency-based clock analysis method: CSAV is proposed in this paper. It computes the circuit response by first solving the state equation in frequency domain, and...
Ling Zhang, Wenjian Yu, Haikun Zhu, Wanping Zhang,...