Sciweavers

Share
15 search results - page 3 / 3
» isvlsi 2003
Sort
View
ISVLSI
2003
IEEE
101views VLSI» more  ISVLSI 2003»
9 years 7 months ago
Energy Benefits of a Configurable Line Size Cache for Embedded Systems
Previous work has shown that cache line sizes impact performance differently for different desktop programs – some programs work better with small line sizes, others with larger...
Chuanjun Zhang, Frank Vahid, Walid A. Najjar
ISVLSI
2003
IEEE
97views VLSI» more  ISVLSI 2003»
9 years 7 months ago
Q-Tree: A New Iterative Improvement Approach for Buffered Interconnect Optimization
The “chicken-egg” dilemma between VLSI interconnect timing optimization and delay calculation suggests an iterative approach. We separate interconnect timing transformation as...
Andrew B. Kahng, Bao Liu
ISVLSI
2003
IEEE
91views VLSI» more  ISVLSI 2003»
9 years 7 months ago
Three-Dimensional Integrated Circuits: Performance, Design Methodology, and CAD Tools
Three-dimensional integration technologies have been proposed in order to mitigate design challenges posed by deep-submicron interconnect. By providing multiple layers of active d...
Shamik Das, Anantha Chandrakasan, Rafael Reif
ISVLSI
2003
IEEE
103views VLSI» more  ISVLSI 2003»
9 years 7 months ago
Energy Recovering ASIC Design
Abstract— Dissipation in the clock tree and state elements of ASIC designs is often a significant fraction of total energy consumption. We propose a methodology for recovering m...
Conrad H. Ziesler, Joohee Kim, Marios C. Papaefthy...
ISVLSI
2003
IEEE
147views VLSI» more  ISVLSI 2003»
9 years 7 months ago
Automated Dynamic Memory Data Type Implementation Exploration and Optimization
The behavior of many algorithms is heavily determined by the input data. Furthermore, this often means that multiple and completely different execution paths can be followed, also...
Marc Leeman, Chantal Ykman-Couvreur, David Atienza...
books