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ITC
1993
IEEE
85views Hardware» more  ITC 1993»
13 years 9 months ago
Structure and Metrology for an Analog Testability Bus
Kenneth P. Parker, John E. McDermid, Stig Oresjo
ITC
1993
IEEE
104views Hardware» more  ITC 1993»
13 years 9 months ago
A BIST Scheme for an SNR Test of a Sigma-Delta ADC
Built-In-Self-Test BIST for VLSI systems is desirable in order to reduce the cost per chip of production-time testing by the manufacturer. In addition, it can provide the means ...
M. F. Toner, Gordon W. Roberts
ITC
1993
IEEE
95views Hardware» more  ITC 1993»
13 years 9 months ago
Fault Diagnosis of Flash ADC using DNL Test
This paper describes a technique which uses the Differential Non Linearity (DNL) test data for fault location and identification of the analog components of a flash ADC. In a flash...
Anchada Charoenrook, Mani Soma
ITC
1993
IEEE
148views Hardware» more  ITC 1993»
13 years 9 months ago
DELTEST: Deterministic Test Generation for Gate-Delay Faults
This paper presents an efficient approach to generate tests for gate delay faults. Unlike other known algorithms which try to generate a 'good' delay test the presented ...
Udo Mahlstedt