A BIST Scheme for an SNR Test of a Sigma-Delta ADC

Built-In-Self-Test BIST for VLSI systems is desirable in order to reduce the cost per chip of production-time testing by the manufacturer. In addition, it can provide the means to perform in-the- eld diagnostics. This paper discusses a Mixed AnalogDigital BIST MADBIST for a Signal-to-Noise-Ratio test of an Analog-to-Digital Converter. The MADBIST strategy for the SNR test of the A D Converter is introduced, accuracy issues are discussed, and experimental results are presented.

• Type: Conference
• Year: 1993
• Where: ITC
• Authors: M. F. Toner, Gordon W. Roberts
• Keywords: Analog-to-Digital Converter, Eld Diagnostics, Hardware, ITC 1993, Mixed AnalogDigital BIST