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VLSID
1999
IEEE
13 years 9 months ago
1999
IEEE
Recently Lillis, et al. presented an elegant dynamic programming approach to RC interconnect delay optimization through driver sizing, repeater insertion, and, wire sizing which e...
VLSID
1999
IEEE
13 years 9 months ago
1999
IEEE
Formal approaches to HW and system design have not been generally adopted, because designers often view the modelling concepts in these approaches as unsuitable for their problems...
VLSID
1999
IEEE
13 years 9 months ago
1999
IEEE
The design and synthesis of asynchronous circuits is gaining importance in both the industrial and academic worlds. Timed circuits are a class of asynchronous circuits that incorp...
VLSID
1999
IEEE
13 years 9 months ago
1999
IEEE
Interconnect tuning and repeater insertion are necessary to optimize interconnectdelay, signalperformanceandintegrity, andinterconnectmanufacturability and reliability. Repeater i...
VLSID
1999
IEEE
13 years 9 months ago
1999
IEEE
In hardware - software codesign paradigm often a performance estimation of the system is needed for hardware - software partitioning. The tremendous growth of application specific...