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VLSID
2002
IEEE
115views VLSI» more  VLSID 2002»
14 years 5 months ago
A Partitioning and Storage Based Built-In Test Pattern Generation Method for Scan Circuits
We describe a built-in test pattern generation method for scan circuits. The method is based on partitioning and storage of test sets. Under this method, a precomputed test set is...
Irith Pomeranz, Sudhakar M. Reddy
VLSID
2002
IEEE
138views VLSI» more  VLSID 2002»
14 years 5 months ago
A Framework for Design Space Exploration of Parameterized VLSI Systems
The paper presents two new approaches to multiobjective design space exploration for parametric VLSI systems. Both considerably reduce the number of simulations needed to determin...
Giuseppe Ascia, Vincenzo Catania, Maurizio Palesi
VLSID
2002
IEEE
102views VLSI» more  VLSID 2002»
14 years 5 months ago
Losses in Multilevel Crossover in VLSI Interconnects
The radiation and surface wave losses may give rise to electromagnetic interference (EMI) problems in high speed VLSI interconnects. Over and above there will be dielectric and co...
P. K. Datta, S. Sanyal, D. Bhattacharya
VLSID
2002
IEEE
79views VLSI» more  VLSID 2002»
14 years 5 months ago
A Power Minimization Technique for Arithmetic Circuits by Cell Selection
As a basic cell of arithmetic circuits, a one-bit full adder and a counter are usually used. Minimizing power consumption of these components is a key issue for low-power circuit ...
Masanori Muroyama, Tohru Ishihara, Akihiko Hyodo, ...
VLSID
2002
IEEE
111views VLSI» more  VLSID 2002»
14 years 5 months ago
Application of Multi-Domain and Multi-Language Cosimulation to an Optical MEM Switch Design
This paper presents the applicability of a cosimulation methodology based on an object-oriented simulation environment, to multi-domain and multi-language systems design. This met...
Ahmed Amine Jerraya, Benoît Charlot, Gabriel...