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VLSID
2005
IEEE
89views VLSI» more  VLSID 2005»
14 years 5 months ago
Power Optimization in Current Mode Circuits
We propose a method to minimize power dissipation in current-mode CMOS analog and multiple-valued logic (MVL) circuits employing a stack of current comparators. First, we present ...
M. S. Bhat, H. S. Jamadagni
VLSID
2005
IEEE
255views VLSI» more  VLSID 2005»
14 years 5 months ago
Estimation of Switching Activity in Sequential Circuits Using Dynamic Bayesian Networks
We propose a novel, non-simulative, probabilistic model for switching activity in sequential circuits, capturing both spatio-temporal correlations at internal nodes and higher ord...
Sanjukta Bhanja, Karthikeyan Lingasubramanian, N. ...
VLSID
2005
IEEE
147views VLSI» more  VLSID 2005»
14 years 5 months ago
Memory-Centric Motion Estimator
In the streaming video processing domain, the only way to meet strict performance and quality requirements and yet to provide the area- and power-wise optimal platform is to apply...
Aleksandar Beric, Ramanathan Sethuraman, Jef L. va...
VLSID
2006
IEEE
111views VLSI» more  VLSID 2006»
14 years 5 months ago
An Area Efficient Mixed-Signal Test Architecture for Systems-on-a-Chip
Hari Vijay Venkatanarayanan, Michael L. Bushnell
VLSID
2006
IEEE
85views VLSI» more  VLSID 2006»
14 years 5 months ago
A Novel Architecture Using the Decorrelating Transform for Low Power Adaptive Filters
This paper presents a novel architecture using the decorrelating (DECOR) transformation technique when applied to an LMS adaptive filter. The DECOR transform has been evaluated pr...
Mark P. Tennant, Ahmet T. Erdogan, Tughrul Arslan,...
VLSID
2006
IEEE
128views VLSI» more  VLSID 2006»
14 years 5 months ago
Custom Reconfigurable Architecture for Autonomous Fault-Recovery of MEMS Vibratory Sensor Electronics
This paper presents a novel custom-reconfigurable architecture, which is tailored to accomplish the electronic circuits associated with MEMS vibratory sensors. The paradigm of thi...
Evangelos F. Stefatos, Tughrul Arslan, Didier Keym...
VLSID
2006
IEEE
169views VLSI» more  VLSID 2006»
14 years 5 months ago
A Hybrid SoC Interconnect with Dynamic TDMA-Based Transaction-Less Buses and On-Chip Networks
The two dominant architectural choices for implementing efficient communication fabrics for SoC's have been transaction-based buses and packet-based Networks-onChip (NoC). Bo...
Thomas D. Richardson, Chrysostomos Nicopoulos, Don...
VLSID
2006
IEEE
156views VLSI» more  VLSID 2006»
14 years 5 months ago
SEAT-LA: A Soft Error Analysis Tool for Combinational Logic
Radiation induced soft errors in combinational logic is expected to become as important as directly induced errors on state elements. Consequently, it has become important to deve...
Jungsub Kim, Mary Jane Irwin, Narayanan Vijaykrish...
VLSID
2006
IEEE
170views VLSI» more  VLSID 2006»
14 years 5 months ago
16-Bit Segmented Type Current Steering DAC for Video Applications
In this paper, 16-bit, 50 MHz Current Steering DAC is designed. This DAC is implemented using TSMC 0.35 ?m technology. An optimum segmentation is done of 16-bits into binary and t...
Gaurav Raja, Basabi Bhaumik
VLSID
2006
IEEE
142views VLSI» more  VLSID 2006»
14 years 5 months ago
Impact of Configurability and Extensibility on IPSec Protocol Execution on Embedded Processors
- Security protocols, such as IPSec and SSL, are being increasingly deployed in the context of networked embedded systems. The resource-constrained nature of embedded systems and, ...
Nachiketh R. Potlapally, Srivaths Ravi, Anand Ragh...