Sciweavers

    DAC
    2005
    ACM
    83views Computer Architecture» more  DAC 2005»
    A watermarking system for IP protection by a post layout incremental router
    13 years 6 months ago
    A watermarking system for IP protection by a post layout incremental router
    Download  www.cecs.uci.edu
    In this paper, we introduce a new watermarking system for IP protection on post-layout design phase. Firstly the copyright is encrypted by DES (Data Encryption Standard) and then ...
    Tingyuan Nie, Tomoo Kisaka, Masahiko Toyonaga
    claim paper
    Read More »
    DAC
    2005
    ACM
    88views Computer Architecture» more  DAC 2005»
    Deterministic approaches to analog performance space exploration (PSE)
    13 years 6 months ago
    Deterministic approaches to analog performance space exploration (PSE)
    Download  videos.dac.com
    Daniel Mueller, Guido Stehr, Helmut E. Graeb, Ulf ...
    claim paper
    Read More »
    DAC
    2005
    ACM
    171views Computer Architecture» more  DAC 2005»
    Asynchronous circuits transient faults sensitivity evaluation
    13 years 6 months ago
    Asynchronous circuits transient faults sensitivity evaluation
    Download  www.cecs.uci.edu
    1 This paper presents a transient faults sensitivity evaluation for Quasi Delay Insensitive (QDI) asynchronous circuits. Because of their specific architecture, asynchronous circui...
    Yannick Monnet, Marc Renaudin, Régis Leveug...
    claim paper
    Read More »
    DAC
    2005
    ACM
    132views Computer Architecture» more  DAC 2005»
    Logic soft errors in sub-65nm technologies design and CAD challenges
    13 years 6 months ago
    Logic soft errors in sub-65nm technologies design and CAD challenges
    Download  www.cs.york.ac.uk
    Logic soft errors are radiation induced transient errors in sequential elements (flip-flops and latches) and combinational logic. Robust enterprise platforms in sub-65nm technolog...
    Subhasish Mitra, Tanay Karnik, Norbert Seifert, Mi...
    claim paper
    Read More »
    DAC
    2005
    ACM
    193views Computer Architecture» more  DAC 2005»
    Multiplexer restructuring for FPGA implementation cost reduction
    13 years 6 months ago
    Multiplexer restructuring for FPGA implementation cost reduction
    Download  www.cecs.uci.edu
    This paper presents a novel synthesis algorithm that reduces the area needed for implementing multiplexers on an FPGA by an average of 18%. This is achieved by reducing the number...
    Paul Metzgen, Dominic Nancekievill
    claim paper
    Read More »
    DAC
    2005
    ACM
    111views Computer Architecture» more  DAC 2005»
    Matlab extensions for the development, testing and verification of real-time DSP software
    13 years 6 months ago
    Matlab extensions for the development, testing and verification of real-time DSP software
    Download  videos.dac.com
    The purpose of this paper is to present the required tools for the development, testing and verification of DSP software in Matlab. The paper motivates a DSP Simulator concept tha...
    David P. Magee
    claim paper
    Read More »
    DAC
    2005
    ACM
    127views Computer Architecture» more  DAC 2005»
    Partitioning-based approach to fast on-chip decap budgeting and minimization
    13 years 6 months ago
    Partitioning-based approach to fast on-chip decap budgeting and minimization
    Download  www.ee.ucr.edu
    This paper proposes a fast decoupling capacitance (decap) allocation and budgeting algorithm for both early stage decap estimation and later stage decap minimization in today’s ...
    Hang Li, Zhenyu Qi, Sheldon X.-D. Tan, Lifeng Wu, ...
    claim paper
    Read More »
    DAC
    2005
    ACM
    141views Computer Architecture» more  DAC 2005»
    Cognitive radio techniques for wide area networks
    13 years 6 months ago
    Cognitive radio techniques for wide area networks
    Download  videos.dac.com
    The cellular wireless market has begun the transition to data centric services including high speed internet access, video, high quality audio, and gaming. Communications technolo...
    William Krenik, Anuj Batra
    claim paper
    Read More »
    DAC
    2005
    ACM
    135views Computer Architecture» more  DAC 2005»
    Performance simulation modeling for fast evaluation of pipelined scalar processor by evaluation reuse
    13 years 6 months ago
    Performance simulation modeling for fast evaluation of pipelined scalar processor by evaluation reuse
    Download  www.cecs.uci.edu
    This paper proposes a rapid and accurate evaluation scheme for cycle counts of a pipelined processor using evaluation reuse technique. Since exploration of an optimal processor is...
    Ho Young Kim, Tag Gon Kim
    claim paper
    Read More »
    DAC
    2005
    ACM
    130views Computer Architecture» more  DAC 2005»
    Design methodology for IC manufacturability based on regular logic-bricks
    13 years 6 months ago
    Design methodology for IC manufacturability based on regular logic-bricks
    Download  www.cs.york.ac.uk
    Implementing logic blocks in an integrated circuit in terms of repeating or regular geometry patterns [6,7] can provide significant advantages in terms of manufacturability and de...
    V. Kheterpal, V. Rovner, T. G. Hersan, D. Motiani,...
    claim paper
    Read More »
    « first‹ previous…101112131415161718…next ›last »
    Explore & Download
    Proceedings Preprints Top 5 Ranked Papers Publications Books Software Tutorials Presentations Lectures Notes Datasets
    Productivity Tools
    International On-screen Keyboard Graphical Social Symbols OCR Text Recognition CSS3 Style Generator Web Page to PDF Web Page to Image PDF Split PDF Merge Latex Equation Editor Sci2ools
    Document Tools
    PDF to Text PDF to Postscript PDF to Thumbnails Excel to PDF Word to PDF Postscript to PDF PowerPoint to PDF Latex to Word Repair Corrupted PDF
    Image Tools
    JPG to PS JPG to PDF Extract Images from PDF Image Converter
    Sciweavers
    About Community Cookies Privacy Policy Terms of Use

    Copyright © Sciweavers LLC, 2009-2024, USA.