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    FPGA
    1997
    ACM
    132views FPGA» more  FPGA 1997»
    Wormhole Run-Time Reconfiguration
    13 years 9 months ago
    Wormhole Run-Time Reconfiguration
    Download  research.microsoft.com
    Configurable Computing Machines (CCMs) are an emerging class of computing platform which provide the computational performance benefits of ASICs, yet retain the flexibility and ra...
    Ray Bittner, Peter M. Athanas
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    FPGA
    1997
    ACM
    120views FPGA» more  FPGA 1997»
    Partially-Dependent Functional Decomposition with Applications in FPGA Synthesis and Mapping
    13 years 9 months ago
    Partially-Dependent Functional Decomposition with Applications in FPGA Synthesis and Mapping
    Download  cadlab.cs.ucla.edu
    In this paper, we give a necessary and sufficient condition for the existence of partially-dependent functional decomposition and develop new algorithms to compute such decomposi...
    Jason Cong, Yean-Yow Hwang
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    FPGA
    1997
    ACM
    127views FPGA» more  FPGA 1997»
    General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
    13 years 9 months ago
    General Modeling and Technology-Mapping Technique for LUT-Based FPGAs
    Download  www.cecs.uci.edu
    We present a general approach to the FPGA technology mapping problem that applies to any logic block composed of lookup tables LUTs and can yield optimal solutions. The connecti...
    Amit Chowdhary, John P. Hayes
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    FPGA
    1997
    ACM
    124views FPGA» more  FPGA 1997»
    A FPGA-Based Implementation of a Fault-Tolerant Neural Architecture for Photon Identification
    13 years 9 months ago
    A FPGA-Based Implementation of a Fault-Tolerant Neural Architecture for Photon Identification
    Download  www.cecs.uci.edu
    Event identification in photon counting ICCD detectors requires a high level image analysis which cannot be easily described algorithmically: neural networks are promising to appr...
    Monica Alderighi, E. L. Gummati, Vincenzo Piuri, G...
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    FCCM
    1997
    IEEE
    103views VLSI» more  FCCM 1997»
    An FPGA architecture for DRAM-based systolic computations
    13 years 9 months ago
    An FPGA architecture for DRAM-based systolic computations
    Download  people.csail.mit.edu
    We propose an FPGA chip architecture based on a conventional FPGA logic array core, in which I/O pins are clocked at a much higher rate than that of the logic array that they serv...
    Norman Margolus
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    FPGA
    1998
    ACM
    153views FPGA» more  FPGA 1998»
    SMAP: Heterogeneous Technology Mapping for Area Reduction in FPGAs with Embedded Memory Arrays
    13 years 9 months ago
    SMAP: Heterogeneous Technology Mapping for Area Reduction in FPGAs with Embedded Memory Arrays
    Download  www.ece.ubc.ca
    It has become clear that large embedded con gurable memory arrays will be essential in future FPGAs. Embedded arrays provide high-density high-speed implementations of the storage...
    Steven J. E. Wilton
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    FPGA
    1998
    ACM
    148views FPGA» more  FPGA 1998»
    Optimizations for a Highly Cost-Efficient Programmable Logic Architecture
    13 years 9 months ago
    Optimizations for a Highly Cost-Efficient Programmable Logic Architecture
    Download  www.cs.york.ac.uk
    Kerry Veenstra, Bruce Pedersen, Jay Schleicher, Ch...
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    FPGA
    1998
    ACM
    140views FPGA» more  FPGA 1998»
    More Wires and Fewer LUTs: A Design Methodology for FPGAs
    13 years 9 months ago
    More Wires and Fewer LUTs: A Design Methodology for FPGAs
    Download  www.cecs.uci.edu
    In designing FPGAs, it is important to achieve a good balance between the number of logic blocks, such as Look-Up Tables (LUTs), and wiring resources. It is dicult to nd an optim...
    Atsushi Takahara, Toshiaki Miyazaki, Takahiro Muro...
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    FPGA
    1998
    ACM
    176views FPGA» more  FPGA 1998»
    A Fast Routability-Driven Router for FPGAs
    13 years 9 months ago
    A Fast Routability-Driven Router for FPGAs
    Download  www.eecg.toronto.edu
    Three factors are driving the demand for rapid FPGA compilation. First, as FPGAs have grown in logic capacity, the compile computation has grown more quickly than the compute powe...
    Jordan S. Swartz, Vaughn Betz, Jonathan Rose
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    FPGA
    1998
    ACM
    160views FPGA» more  FPGA 1998»
    A New Retiming-Based Technology Mapping Algorithm for LUT-based FPGAs
    13 years 9 months ago
    A New Retiming-Based Technology Mapping Algorithm for LUT-based FPGAs
    Download  www.eecs.berkeley.edu
    In this paper, we present a new retiming-based technology mapping algorithm for look-up table-based eld programmable gate arrays. The algorithm is based on a novel iterative proce...
    Peichen Pan, Chih-Chang Lin
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