Sciweavers

APCSAC
2006
IEEE
13 years 11 months ago
A Context-Switch Reduction Heuristic for Power-Aware Off-Line Scheduling
Abstract. Scheduling algorithms significantly affect the performance of a realtime system. In systems with power constraints, context switches in a schedule result in wasted power ...
Biju K. Raveendran, Sundar Balasubramaniam, K. Dur...
APCSAC
2006
IEEE
13 years 11 months ago
Optimization and Evaluating of StreamYGX2 on MASA Stream Processor
Mei Wen, Nan Wu, Changqing Xun, Wei Wu, Chunyuan Z...
APCSAC
2006
IEEE
13 years 11 months ago
Understanding Prediction Limits Through Unbiased Branches
The majority of currently available branch predictors base their prediction accuracy on the previous k branch outcomes. Such predictors sustain high prediction accuracy but they do...
Lucian N. Vintan, Arpad Gellert, Adrian Florea, Ma...
APCSAC
2006
IEEE
13 years 11 months ago
A High Performance Simulator System for a Multiprocessor System Based on a Multi-way Cluster
In the ubiquitous era, it is necessary to research the architectures of multiprocessor system with high performance and low power consumption. A simulator developed in high level l...
Arata Shinozaki, Masatoshi Shima, Minyi Guo, Mitsu...
APCSAC
2006
IEEE
13 years 11 months ago
Reorganizing UNIX for Reliability
In this paper, we discuss the architecture of a modular UNIX-compatible operating system, MINIX 3, that provides reliability beyond that of most other systems. With nearly the ent...
Jorrit N. Herder, Herbert Bos, Ben Gras, Philip Ho...
APCSAC
2006
IEEE
13 years 11 months ago
A Study of the Performance Potential for Dynamic Instruction Hints Selection
Abstract. Instruction hints have become an important way to communicate compile-time information to the hardware. They can be generated by the compiler and the post-link optimizer ...
Rao Fu, Jiwei Lu, Antonia Zhai, Wei-Chung Hsu
APCSAC
2006
IEEE
13 years 11 months ago
Issues and Support for Dynamic Register Allocation
Abstract. Post-link and dynamic optimizations have become important to achieve program performance. A major challenge in post-link and dynamic optimizations is the acquisition of r...
Abhinav Das, Rao Fu, Antonia Zhai, Wei-Chung Hsu
APCSAC
2006
IEEE
13 years 11 months ago
Using Branch Prediction Information for Near-Optimal I-Cache Leakage
This paper describes a new on-demand wakeup prediction policy for instruction cache leakage control that achieves better leakage savings than prior policies, and avoids the perform...
Sung Woo Chung, Kevin Skadron
APCSAC
2006
IEEE
13 years 11 months ago
Functional Unit Chaining: A Runtime Adaptive Architecture for Reducing Bypass Delays
Abstract. Bypass delays are expected to grow beyond 1ns as technology scales. These delays necessitate pipelining of bypass paths at processor frequencies above 1GHz and thus affe...
Lih Wen Koh, Oliver Diessel
APCSAC
2006
IEEE
13 years 11 months ago
Power-Efficient Microkernel of Embedded Operating System on Chip
Because the absence of hardware support, almost all of embedded operating system are based on SDRAM in past time. With progress of embedded system hardware, embedded system can pro...
Tianzhou Chen, Wei Hu, Yi Lian