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ASPDAC
2004
ACM
169views Hardware» more  ASPDAC 2004»
13 years 10 months ago
Design of real-time VGA 3-D image sensor using mixed-signal techniques
— We have developed the first real-time 3-D image sensor with VGA pixel resolution using mixed-signal techniques to achieve high-speed and high-accuracy range calculation based ...
Yusuke Oike, Makoto Ikeda, Kunihiro Asada
ASPDAC
2004
ACM
116views Hardware» more  ASPDAC 2004»
13 years 10 months ago
Temperature-aware global placement
— This paper describes a deterministic placement method for standard cells which minimizes total power consumption and leads to a smooth temperature distribution over the die. It...
Bernd Obermeier, Frank M. Johannes
ASPDAC
2004
ACM
145views Hardware» more  ASPDAC 2004»
13 years 10 months ago
Hierarchical random-walk algorithms for power grid analysis
Abstract— This paper presents a power grid analyzer that combines a divide-and-conquer strategy with a random-walk engine. A single-level hierarchical method is first described ...
Haifeng Qian, Sachin S. Sapatnekar
ASPDAC
2004
ACM
95views Hardware» more  ASPDAC 2004»
13 years 10 months ago
Toward mobile phone Linux
Yukikazu Nakamoto
ASPDAC
2004
ACM
97views Hardware» more  ASPDAC 2004»
13 years 10 months ago
A cosynthesis algorithm for application specific processors with heterogeneous datapaths
Abstract- This paper proposes a hardwadsoftware cosynthesis algorithm for processors with heterogeneous registers. Given a CDFG correspondingto an application program and a timing ...
Yuichiro Miyaoka, Nozomu Togawa, Masao Yanagisawa,...
ASPDAC
2004
ACM
83views Hardware» more  ASPDAC 2004»
13 years 10 months ago
A procedure for obtaining a behavioral description for the control logic of a non-linear pipeline
Much attention has been directed to different aspects of the design of pipelines [1,2,3,4]. Design of the control logic of non-linear pipelines has however, been considered as a su...
Hashem Hashemi Najaf-abadi
ASPDAC
2004
ACM
104views Hardware» more  ASPDAC 2004»
13 years 10 months ago
A small-area high-performance 512-point 2-dimensional FFT single-chip processor
: A single-chip 512-point FFT processor is presented. This processor is based on the cached-memory architecture (CMA) with the resource-saving multidatapath radix-23 computation el...
Naoto Miyamoto, Leo Karnan, Kazuyuki Maruo, Koji K...
ASPDAC
2004
ACM
118views Hardware» more  ASPDAC 2004»
13 years 10 months ago
Minimization of memory size for heterogeneous MDDs
Abstract— In this paper, we propose exact and heuristic algorithms for minimizing the memory size for heterogeneous Multivalued Decision Diagrams (MDDs). In a heterogeneous MDD, ...
Shinobu Nagayama, Tsutomu Sasao
ASPDAC
2004
ACM
65views Hardware» more  ASPDAC 2004»
13 years 10 months ago
MOSFET modeling for RF-CMOS design
Mitiko Miura-Mattausch
ASPDAC
2004
ACM
114views Hardware» more  ASPDAC 2004»
13 years 10 months ago
Timing measurement unit with multi-stage TVC for embedded memories
Kae-Jiun Mo, Shao-Sheng Yang, Tsin-Yuan Chang