ISCA
2011
IEEE
2011
IEEE
Increasing the effectiveness of directory caches by deactivating coherence for private memory blocks
12 years 8 months ago
To meet the demand for more powerful high-performance shared-memory servers, multiprocessor systems must incorporate efficient and scalable cache coherence protocols, such as thos...
TPDS
2010
12 years 11 months ago
2010
The importance of transient faults is predicted to grow due to current technology trends of increased scale of integration. One of the components that will be significantly affecte...
MICRO
2010
IEEE
13 years 2 months ago
2010
IEEE
We propose an architectural design methodology for designing formally verifiable cache coherence protocols, called Fractal Coherence. Properly designed to be fractal in behavior, t...
JLP
2007
13 years 4 months ago
2007
Jackal is a fine-grained distributed shared memory implementation of the Java programming language. It aims to implement Java’s memory model and allows multithreaded Java progr...
DSL
1997
13 years 6 months ago
1997
In this paper we describe our experience with Teapot [7], a domain-specific language for writing cache coherence protocols. Cache coherence is of concern when parallel and distrib...
FMCAD
2004
Springer
13 years 8 months ago
2004
Springer
Abstract. We present a simple method for verifying the safety properties of cache coherence protocols with arbitrarily many nodes. Our presentation begins with two examples. The fi...
CF
2007
ACM
13 years 9 months ago
2007
ACM
In this work we reduce interconnect power dissipation in Symmetric Multiprocessors or SMPs. We revisit snoopy cache coherence protocols and reduce unnecessary interconnect activit...
APPT
2009
Springer
13 years 9 months ago
2009
Springer
Abstract. In many-core CMP architectures, the cache coherence protocol is a key component since it can add requirements of area and power consumption to the final design and, there...
MICRO
2006
IEEE
13 years 11 months ago
2006
IEEE
Ring interconnects may be an attractive solution for future chip multiprocessors because they can enable faster links than buses and simpler switches than arbitrary switched inter...
IPPS
2007
IEEE
13 years 11 months ago
2007
IEEE
Snoopy cache coherence protocols broadcast requests to all nodes, reducing the latency of cache to cache transfer misses at the expense of increasing interconnect power. We propos...