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GLVLSI
2005
IEEE
104views VLSI» more  GLVLSI 2005»
13 years 10 months ago
Wave-pipelined 2-slot time division multiplexed (WP/2-TDM) routing
The ever-increasing number of transistors on a chip has resulted in very large scale integration (VLSI) systems whose performance and manufacturing costs are driven by on-chip wir...
Ajay Joshi, Jeffrey A. Davis
DFT
2007
IEEE
105views VLSI» more  DFT 2007»
13 years 11 months ago
A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction
Decreasing feature sizes have led to an increased vulnerability of random logic to soft errors. A particle strike may cause a glitch or single event transient (SET) at the output ...
Sybille Hellebrand, Christian G. Zoellin, Hans-Joa...
ICCAD
2003
IEEE
198views Hardware» more  ICCAD 2003»
14 years 1 months ago
A CAD Framework for Co-Design and Analysis of CMOS-SET Hybrid Integrated Circuits
This paper introduces a CAD framework for co-simulation of hybrid circuits containing CMOS and SET (Single Electron Transistor) devices. An improved analytical model for SET is al...
Santanu Mahapatra, Kaustav Banerjee, Florent Pegeo...