Sciweavers

DAC
2005
ACM
13 years 7 months ago
Constraint-aware robustness insertion for optimal noise-tolerance enhancement in VLSI circuits
Reliability of nanometer circuits is becoming a major concern in today’s VLSI chip design due to interferences from multiple noise sources as well as radiation-induced soft erro...
Chong Zhao, Yi Zhao, Sujit Dey
DAC
2005
ACM
13 years 7 months ago
Dynamic abstraction using SAT-based BMC
Liang Zhang, Mukul R. Prasad, Michael S. Hsiao, Th...
DAC
2005
ACM
13 years 7 months ago
Multi-frequency wrapper design and optimization for embedded cores under average power constraints
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...
Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty
DAC
2005
ACM
13 years 7 months ago
A green function-based parasitic extraction method for inhomogeneous substrate layers
This paper presents a new Green function-based approach for substrate parasitic extraction in substrates with inhomogeneous layers. This new formulation allows analysis of noise c...
Chenggang Xu, Ranjit Gharpurey, Terri S. Fiez, Kar...
DAC
2005
ACM
13 years 7 months ago
Timing-driven placement by grid-warping
Grid-warping is a recent placement strategy based on a novel physical analogy: rather than move the gates to optimize their location, it elastically deforms a model of the 2-D chi...
Zhong Xiu, Rob A. Rutenbar
DAC
2005
ACM
13 years 7 months ago
Formal verification: is it real enough?
Yaron Wolfsthal, Rebecca M. Gott
DAC
2005
ACM
13 years 7 months ago
Normalization at the arithmetic bit level
We propose a normalization technique for verifying arithmetic circuits in a bounded model checking environment. Our technique operates on the arithmetic bit level (ABL) descriptio...
Markus Wedler, Dominik Stoffel, Wolfgang Kunz
DAC
2005
ACM
13 years 7 months ago
Response compaction with any number of unknowns using a new LFSR architecture
This paper presents a new test response compaction technique with any number of unknown logic values (X’s) in the test response bits. The technique leverages an X-tolerant respo...
Erik H. Volkerink, Subhasish Mitra
DAC
2005
ACM
13 years 7 months ago
Differentiate and deliver: leveraging your partners
For the past 25 years, the EDA industry has played a major role in the growth of the semiconductor industry, providing tools and services that have helped companies develop electr...
Jay Vleeschhouwer, Warren East, Michael J. Fister,...