Sciweavers

DATE
2006
IEEE
140views Hardware» more  DATE 2006»
13 years 11 months ago
A hybrid framework for design and analysis of fault-tolerant architectures
It is anticipated that self assembled ultra-dense nanomemories will be more susceptible to manufacturing defects and transient faults than conventional CMOS-based memories, thus t...
Debayan Bhaduri, Sandeep K. Shukla, Deji Coker, Va...
DATE
2006
IEEE
352views Hardware» more  DATE 2006»
13 years 11 months ago
Fast-prototyping using the BTnode platform
The BTnode platform is a versatile and flexible platform for functional prototyping of ad hoc and sensor networks. Based on an Atmel microcontroller, a Bluetooth radio and a low-...
Jan Beutel
DATE
2006
IEEE
87views Hardware» more  DATE 2006»
13 years 11 months ago
Supporting task migration in multi-processor systems-on-chip: a feasibility study
With the advent of multi-processor systems-on-chip, the interest in process migration is again on the rise both in research and in product development. New challenges associated w...
Stefano Bertozzi, Andrea Acquaviva, Davide Bertozz...
DATE
2006
IEEE
127views Hardware» more  DATE 2006»
13 years 11 months ago
Software implementation of Tate pairing over GF(2m)
Recently, the interest about the Tate pairing over binary fields has decreased due to the existence of efficient attacks to the discrete logarithm problem in the subgroups of su...
Guido Bertoni, Luca Breveglieri, Pasqualina Fragne...
DATE
2006
IEEE
76views Hardware» more  DATE 2006»
13 years 11 months ago
Efficient minimization of fully testable 2-SPP networks
Anna Bernasconi, Valentina Ciriani, Rolf Drechsler...
DATE
2006
IEEE
95views Hardware» more  DATE 2006»
13 years 11 months ago
An effective technique for minimizing the cost of processor software-based diagnosis in SoCs
The ever increasing usage of microprocessor devices is sustained by a high volume production that in turn requires a high production yield, backed by a controlled process. Fault d...
Paolo Bernardi, Ernesto Sánchez, Massimilia...
DATE
2006
IEEE
108views Hardware» more  DATE 2006»
13 years 11 months ago
Automatic march tests generations for static linked faults in SRAMs
Static Linked Faults are considered an interesting class of memory faults. Their capability of influencing the behavior of other faults causes the hiding of the fault effect and m...
Alfredo Benso, Alberto Bosio, Stefano Di Carlo, Gi...
DATE
2006
IEEE
120views Hardware» more  DATE 2006»
13 years 11 months ago
Exploiting TLM and object introspection for system-level simulation
Giovanni Beltrame, Donatella Sciuto, Cristina Silv...