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DATE
2009
IEEE
93views Hardware» more  DATE 2009»
13 years 11 months ago
DPR in high energy physics
The Active Buffer project is part of the CBM (compressed baryonic matter) experiment and takes advantage of the DPR (dynamic partial reconfiguration) technology, in which a dynam...
Wenxue Gao, Andreas Kugel, Reinhard Männer, N...
DATE
2009
IEEE
125views Hardware» more  DATE 2009»
13 years 11 months ago
Group-caching for NoC based multicore cache coherent systems
Wang Zuo, Shi Feng, Zuo Qi, Ji Weixing, Li Jiaxin,...
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
13 years 11 months ago
New simulation methodology of 3D surface roughness loss for interconnects modeling
— As clock frequencies exceed giga-Hertz, the extra power loss due to conductor surface roughness in interconnects and packagings is more evident and thus demands a proper accou...
Quan Chen, Ngai Wong
DATE
2009
IEEE
131views Hardware» more  DATE 2009»
13 years 11 months ago
Process Variation Aware SRAM/Cache for aggressive voltage-frequency scaling
this paper proposes a novel Process Variation Aware SRAM architecture designed to inherently support voltage scaling. The peripheral circuitry of the SRAM is modified to selectivel...
Avesta Sasan, Houman Homayoun, Ahmed M. Eltawil, F...
DATE
2009
IEEE
92views Hardware» more  DATE 2009»
13 years 11 months ago
Using randomization to cope with circuit uncertainty
—Future computing systems will feature many cores that run fast, but might show more faults compared to existing CMOS technologies. New software methodologies must be adopted to ...
Hamid Safizadeh, Mohammad Tahghighi, Ehsan K. Arde...
DATE
2009
IEEE
123views Hardware» more  DATE 2009»
13 years 11 months ago
Shock immunity enhancement via resonance damping in gyroscopes for automotive applications
—This paper presents an innovative and effective method to improve the performance of a micro mechanical gyroscope by introducing the damping of its sensing quality factor. Indee...
Eleonora Marchetti, Luca Fanucci, A. Rocchi, Marco...
DATE
2009
IEEE
136views Hardware» more  DATE 2009»
13 years 11 months ago
A file-system-aware FTL design for flash-memory storage systems
Abstract—As flash memory became popular over various platforms, there is a strong demand on the performance degradation problem, due to the special characteristics of flash mem...
Po-Liang Wu, Yuan-Hao Chang, Tei-Wei Kuo
DATE
2009
IEEE
88views Hardware» more  DATE 2009»
13 years 11 months ago
Latency criticality aware on-chip communication
—Packet-switched interconnect fabric is a promising on-chip communication solution for many-core architectures. It offers high throughput and excellent scalability for on-chip da...
Zheng Li, Jie Wu, Li Shang, Robert P. Dick, Yihe S...
DATE
2009
IEEE
110views Hardware» more  DATE 2009»
13 years 11 months ago
Trace signal selection for visibility enhancement in post-silicon validation
Today’s complex integrated circuit designs increasingly rely on post-silicon validation to eliminate bugs that escape from presilicon verification. One effective silicon debug ...
Xiao Liu, Qiang Xu