Sciweavers

DATE
2009
IEEE
149views Hardware» more  DATE 2009»
13 years 11 months ago
High level H.264/AVC video encoder parallelization for multiprocessor implementation
— H.264/AVC (Advanced Video Codec) is a new video coding standard developed by a joint effort of the ITU-TVCEG and ISO/IEC MPEG. This standard provides higher coding efficiency r...
Hajer K. Zrida, Abderrazek Jemai, Ahmed C. Ammari,...
DATE
2009
IEEE
140views Hardware» more  DATE 2009»
13 years 11 months ago
Lifetime reliability-aware task allocation and scheduling for MPSoC platforms
With the relentless scaling of semiconductor technology, the lifetime reliability of embedded multiprocessor platforms has become one of the major concerns for the industry. If th...
Lin Huang, Feng Yuan, Qiang Xu
DATE
2009
IEEE
242views Hardware» more  DATE 2009»
13 years 11 months ago
A high performance reconfigurable Motion Estimation hardware architecture
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. For the recently available high definition frame sizes and hi...
Ozgur Tasdizen, Halil Kukner, Abdulkadir Akin, Ilk...
DATE
2009
IEEE
171views Hardware» more  DATE 2009»
13 years 11 months ago
Automatic generation of streaming datapaths for arbitrary fixed permutations
Abstract—This paper presents a technique to perform arbitrary fixed permutations on streaming data. We describe a parameterized architecture that takes as input n data points st...
Peter A. Milder, James C. Hoe, Markus Püschel
DATE
2009
IEEE
143views Hardware» more  DATE 2009»
13 years 11 months ago
Dimensioning heterogeneous MPSoCs via parallelism analysis
—In embedded computing we face a continuously growing algorithm complexity combined with a constantly rising number of applications running on a single system. Multi-core systems...
Bastian Ristau, Torsten Limberg, Oliver Arnold, Ge...
DATE
2009
IEEE
116views Hardware» more  DATE 2009»
13 years 11 months ago
An MDE methodology for the development of high-integrity real-time systems
—This paper reports on experience gained and lessons learned from an intensive investigation of model-driven engineering methodology and technology for application to high-integr...
Silvia Mazzini, Stefano Puri, Tullio Vardanega
DATE
2009
IEEE
113views Hardware» more  DATE 2009»
13 years 11 months ago
Algorithms for the automatic extension of an instruction-set
Abstract—In this paper, two general algorithms for the automatic generation of instruction-set extensions are presented. The basic instruction set of a reconfigurable architectu...
Carlo Galuzzi, Dimitris Theodoropoulos, Roel Meeuw...
DATE
2009
IEEE
83views Hardware» more  DATE 2009»
13 years 11 months ago
Performance-driven dual-rail insertion for chip-level pre-fabricated design
In recent years, pre-fabricated design styles grow up rapidly to amortize the mask cost. However, the interconnection delay of the pre-fabricated design styles slows down the circ...
Fu-Wei Chen, Yi-Yu Liu
DATE
2009
IEEE
86views Hardware» more  DATE 2009»
13 years 11 months ago
A formal approach to design space exploration of protocol converters
In the field of chip design, hardware module reuse is a standard solution to the increasing complexity of chip architecture and the pressures to reduce time to market. In the abs...
Karin Avnit, Arcot Sowmya
DATE
2009
IEEE
168views Hardware» more  DATE 2009»
13 years 11 months ago
Selective state retention design using symbolic simulation
Abstract—Addressing both standby and active power is a major challenge in developing System-on-Chip designs for batterypowered products. Powering off sections of logic or memorie...
Ashish Darbari, Bashir M. Al-Hashimi, David Flynn,...