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DATE
2010
IEEE
89views Hardware» more  DATE 2010»
13 years 10 months ago
Improved countermeasure against Address-bit DPA for ECC scalar multiplication
Masami Izumi, Jun Ikegami, Kazuo Sakiyama, Kazuo O...
DATE
2010
IEEE
166views Hardware» more  DATE 2010»
13 years 10 months ago
GoldMine: Automatic assertion generation using data mining and static analysis
Shobha Vasudevan, David Sheridan, Sanjay J. Patel,...
DATE
2010
IEEE
170views Hardware» more  DATE 2010»
13 years 10 months ago
Analytical model for TDDB-based performance degradation in combinational logic
With aggressive gate oxide scaling, latent defects in the gate oxide manifest as traps that, in time, lead to gate oxide breakdown. Progressive gate oxide breakdown, also referred...
Mihir Choudhury, Vikas Chandra, Kartik Mohanram, R...
DATE
2010
IEEE
127views Hardware» more  DATE 2010»
13 years 10 months ago
A generalized control-flow-aware pattern recognition algorithm for behavioral synthesis
— Pattern recognition has many applications in design automation. A generalized pattern recognition algorithm is presented in this paper which can efficiently extract similar pat...
Jason Cong, Hui Huang, Wei Jiang
DATE
2010
IEEE
166views Hardware» more  DATE 2010»
13 years 10 months ago
From transistors to MEMS: Throughput-aware power gating in CMOS circuits
—In this paper we study the effectiveness of two power gating methods – transistor switches and MEMS switches – in reducing the power consumption of a design with a certain t...
Michael B. Henry, Leyla Nazhandali
DATE
2010
IEEE
111views Hardware» more  DATE 2010»
13 years 10 months ago
Instruction precomputation with memoization for fault detection
—Fault tolerance (FT) has become a major concern in computing systems. Instruction duplication has been proposed to verify application execution at run time. Two techniques, inst...
Demid Borodin, Ben H. H. Juurlink
DATE
2010
IEEE
122views Hardware» more  DATE 2010»
13 years 10 months ago
SimTag: Exploiting tag bits similarity to improve the reliability of the data caches
— Though tag bits in the data caches are vulnerable to transient errors, few effort has been made to reduce their vulnerability. In this paper, we propose to exploit prevalent sa...
Jesung Kim, Soontae Kim, Yebin Lee
DATE
2010
IEEE
111views Hardware» more  DATE 2010»
13 years 10 months ago
Dynamically reconfigurable register file for a softcore VLIW processor
Stephan Wong, Fakhar Anjam, Faisal Nadeem
DATE
2010
IEEE
168views Hardware» more  DATE 2010»
13 years 10 months ago
A new placement algorithm for the mitigation of multiple cell upsets in SRAM-based FPGAs
Modern FPGAs have been designed with advanced integrated circuit techniques that allow high speed and low power performance, joined to reconfiguration capabilities. This makes new...
Luca Sterpone, Niccolò Battezzati