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DATE
2010
IEEE
111views Hardware» more  DATE 2010»
13 years 10 months ago
Evaluation of runtime task mapping heuristics with rSesame - a case study
Abstract—rSesame is a generic modeling and simulation framework which can explore and evaluate reconfigurable systems at the early design stages. The framework can be used to ex...
Kamana Sigdel, Mark Thompson, Carlo Galuzzi, Andy ...
DATE
2010
IEEE
103views Hardware» more  DATE 2010»
13 years 10 months ago
A compact digital amplitude modulator in 90nm CMOS
—This paper presents a 90 nm CMOS digital amplitude modulator for polar transmitter. It reaches an output power of -2.5 dBmRMS using a WLAN OFDM 64QAM modulation at 2.45GHz achie...
V. Chironi, Björn Debaillie, Andrea Baschirot...
DATE
2010
IEEE
110views Hardware» more  DATE 2010»
13 years 10 months ago
Enabling efficient post-silicon debug by clustering of hardware-assertions
—Bug-free first silicon is not guaranteed by the existing pre-silicon verification techniques. To have impeccable products, it is now required to identify any bug as soon as the ...
Mohammad Hossein Neishaburi, Zeljko Zilic
DATE
2010
IEEE
129views Hardware» more  DATE 2010»
13 years 10 months ago
AUTOSAR and the automotive tool chain
- This paper will present how the new concepts of the AUTOSAR system methodology influence the SWdevelopment tool-chain landscape.
Stefan Voget
DATE
2010
IEEE
136views Hardware» more  DATE 2010»
13 years 10 months ago
Reversible logic synthesis through ant colony optimization
Abstract—We propose a novel synthesis technique for reversible logic based on ant colony optimization (ACO). In our ACO-based approach, reversible logic synthesis is formulated a...
Min Li, Yexin Zheng, Michael S. Hsiao, Chao Huang
DATE
2010
IEEE
148views Hardware» more  DATE 2010»
13 years 10 months ago
DVFS based task scheduling in a harvesting WSN for Structural Health Monitoring
— The task scheduler of an energy harvesting wireless sensor node (WSN) must adapt the task complexity and maximize the accuracy of the tasks within the constraint of limited ene...
A. Ravinagarajan, D. Dondi, Tajana Simunic Rosing
DATE
2010
IEEE
171views Hardware» more  DATE 2010»
13 years 10 months ago
Digital statistical analysis using VHDL
—Variations of process parameters have an important impact on reliability and yield in deep sub micron IC technologies. One methodology to estimate the influence of these effects...
Manfred Dietrich, Uwe Eichler, Joachim Haase
DATE
2010
IEEE
163views Hardware» more  DATE 2010»
13 years 10 months ago
Optimizing equivalence checking for behavioral synthesis
Abstract—Behavioral synthesis is the compilation of an Electronic system-level (ESL) design into an RTL implementation. We present a suite of optimizations for equivalence checki...
Kecheng Hao, Fei Xie, Sandip Ray, Jin Yang
DATE
2010
IEEE
154views Hardware» more  DATE 2010»
13 years 10 months ago
ERSA: Error Resilient System Architecture for probabilistic applications
There is a growing concern about the increasing vulnerability of future computing systems to errors in the underlying hardware. Traditional redundancy techniques are expensive for...
Larkhoon Leem, Hyungmin Cho, Jason Bau, Quinn A. J...
DATE
2010
IEEE
124views Hardware» more  DATE 2010»
13 years 10 months ago
Energy-efficient variable-flow liquid cooling in 3D stacked architectures
Ayse Kivilcim Coskun, David Atienza, Tajana Simuni...