Sciweavers

DATE
2010
IEEE
156views Hardware» more  DATE 2010»
13 years 7 months ago
Defect aware X-filling for low-power scan testing
Various X-filling methods have been proposed for reducing the shift and/or capture power in scan testing. The main drawback of these methods is that X-filling for low power leads t...
S. Balatsouka, V. Tenentes, Xrysovalantis Kavousia...
DATE
2010
IEEE
195views Hardware» more  DATE 2010»
13 years 7 months ago
Cool MPSoC programming
Abstract--This paper summarizes a special session on multicore/multi-processor system-on-chip (MPSoC) programming challenges. Wireless multimedia terminals are among the key driver...
Rainer Leupers, Lothar Thiele, Xiaoning Nie, Bart ...
DATE
2010
IEEE
139views Hardware» more  DATE 2010»
13 years 8 months ago
Finding reset nondeterminism in RTL designs - scalable X-analysis methodology and case study
Due to increases in design complexity, routing a reset signal to all registers is becoming more difficult. One way to solve this problem is to reset only certain registers and rely...
Hong-Zu Chou, Haiqian Yu, Kai-Hui Chang, Dylan Dob...
DATE
2010
IEEE
126views Hardware» more  DATE 2010»
13 years 8 months ago
Scenario-based analysis and synthesis of real-time systems using uppaal
Abstract. We propose an approach to scenario-based analysis and synthesis of real-time embedded systems. The inter-process behaviors of a system are modeled as a set of driving uni...
Kim Guldstrand Larsen, Shuhao Li, Brian Nielsen, S...
DATE
2010
IEEE
130views Hardware» more  DATE 2010»
13 years 8 months ago
Supporting Distributed Shared Memory on multi-core Network-on-Chips using a dual microcoded controller
Abstract—Supporting Distributed Shared Memory (DSM) is essential for multi-core Network-on-Chips for the sake of reusing huge amount of legacy code and easy programmability. We p...
Xiaowen Chen, Zhonghai Lu, Axel Jantsch, Shuming C...
DATE
2010
IEEE
175views Hardware» more  DATE 2010»
13 years 8 months ago
Approximate logic synthesis for error tolerant applications
─ Error tolerance formally captures the notion that – for a wide variety of applications including audio, video, graphics, and wireless communications – a defective chip that...
Doochul Shin, Sandeep K. Gupta
DATE
2010
IEEE
122views Hardware» more  DATE 2010»
13 years 9 months ago
Optimal regulation of traffic flows in networks-on-chip
We have proposed (, )-based flow regulation to reduce delay and backlog bounds in SoC architectures, where bounds the traffic burstiness and the traffic rate. The regulation is co...
Fahimeh Jafari, Zhonghai Lu, Axel Jantsch, Mohamma...
DATE
2010
IEEE
148views Hardware» more  DATE 2010»
13 years 9 months ago
Scoped identifiers for efficient bit aligned logging
Abstract--Detailed diagnostic data is a prerequisite for debugging problems and understanding runtime performance in distributed wireless embedded systems. Severe bandwidth limitat...
Roy Shea, Mani B. Srivastava, Young Cho
DATE
2010
IEEE
163views Hardware» more  DATE 2010»
13 years 9 months ago
Enhanced Q-learning algorithm for dynamic power management with performance constraint
- This paper presents a novel power management techniques based on enhanced Q-learning algorithms. By exploiting the submodularity and monotonic structure in the cost function of a...
Wei Liu, Ying Tan, Qinru Qiu
DATE
2010
IEEE
190views Hardware» more  DATE 2010»
13 years 9 months ago
Ultra-high throughput string matching for Deep Packet Inspection
Deep Packet Inspection (DPI) involves searching a packet's header and payload against thousands of rules to detect possible attacks. The increase in Internet usage and growing...
Alan Kennedy, Xiaojun Wang, Zhen Liu, Bin Liu