Sciweavers

DATE
2010
IEEE
184views Hardware» more  DATE 2010»
13 years 9 months ago
An analytical method for evaluating Network-on-Chip performance
Today, due to the increasing demand for more and more complex applications in the consumer electronic market segment, Systems-on-Chip consist of many processing elements and becom...
Sahar Foroutan, Yvain Thonnart, Richard Hersemeule...
DATE
2010
IEEE
121views Hardware» more  DATE 2010»
13 years 9 months ago
Properties of and improvements to time-domain dynamic thermal analysis algorithms
—Temperature has a strong influence on integrated circuit (IC) performance, power consumption, and reliability. However, accurate thermal analysis can impose high computation co...
Xi Chen, Robert P. Dick, Li Shang
DATE
2010
IEEE
145views Hardware» more  DATE 2010»
13 years 9 months ago
KL-Cuts: A new approach for logic synthesis targeting multiple output blocks
— This paper introduces the concept of kl-feasible cuts, by controlling both the number k of inputs and the number l of outputs in a circuit cut. To provide scalability, the conc...
Osvaldo Martinello, Felipe S. Marques, Renato P. R...
DATE
2010
IEEE
184views Hardware» more  DATE 2010»
13 years 9 months ago
Parallel subdivision surface rendering and animation on the Cell BE processor
—Subdivision Surfaces provide a compact way to describe a smooth surface using a mesh model. They are widely used in 3D animation and nearly all modern modeling programs support ...
R. Grottesi, S. Morigi, Martino Ruggiero, Luca Ben...
DATE
2010
IEEE
141views Hardware» more  DATE 2010»
13 years 9 months ago
Carbon nanotube circuits: Living with imperfections and variations
Carbon Nanotube Field-Effect Transistors (CNFETs) can potentially provide significant energy-delay-product benefits compared to silicon CMOS. However, CNFET circuits are subject t...
Jie Zhang, Nishant Patil, Albert Lin, H.-S. Philip...
DATE
2010
IEEE
164views Hardware» more  DATE 2010»
13 years 9 months ago
On passivity of the super node algorithm for EM modeling of interconnect systems
—The super node algorithm performs model order reduction based on physical principles. Although the algorithm provides us with compact models, its passivity has not thoroughly be...
Maria V. Ugryumova, Wil H. A. Schilders
DATE
2010
IEEE
141views Hardware» more  DATE 2010»
13 years 9 months ago
Loosely Time-Triggered Architectures for Cyber-Physical Systems
Abstract—Cyber-Physical Systems require distributed architectures to support safety critical real-time control. Kopetz’ Time-Triggered Architectures (TTA) have been proposed as...
Albert Benveniste
DATE
2010
IEEE
166views Hardware» more  DATE 2010»
13 years 9 months ago
Increasing PCM main memory lifetime
Alexandre P. Ferreira, Miao Zhou, S. Bock, Bruce R...
DATE
2010
IEEE
175views Hardware» more  DATE 2010»
13 years 9 months ago
Challenges in the design of automotive software
—Since the foundation of AUTomotive Open System ARchitecture (AUTOSAR), the AUTOSAR Core Partners and more than 65 Premium and Development Members have been working on the standa...
Simon Fürst
DATE
2010
IEEE
160views Hardware» more  DATE 2010»
13 years 9 months ago
Soft error-aware design optimization of low power and time-constrained embedded systems
— In this paper, we examine the impact of application task mapping on the reliability of MPSoC in the presence of single-event upsets (SEUs). We propose a novel soft erroraware d...
Rishad A. Shafik, Bashir M. Al-Hashimi, Krishnendu...