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EURODAC
1995
IEEE
131views VHDL» more  EURODAC 1995»
13 years 8 months ago
System level design, a VHDL based approach
A hierarchical system design flow was developed to facilitate concurrent development and Time-to-Market reductions. The system design flow provides for codesign of (embedded) driv...
Joris van den Hurk, Edwin Dilling
EVOW
2001
Springer
13 years 9 months ago
ARPIA: A High-Level Evolutionary Test Signal Generator
The integrated circuits design flow is rapidly moving towards higher description levels. However, test-related activities are lacking behind this trend, mainly since effective faul...
Fulvio Corno, Gianluca Cumani, Matteo Sonza Reorda...
ISQED
2003
IEEE
119views Hardware» more  ISQED 2003»
13 years 10 months ago
System and Framework for QA of Process Design Kits
In this paper, we evaluate the dependencies between tools, data and environment in process design kits, and present a framework for systematically analyzing the quality of the des...
M. C. Scott, M. O. Peralta, Jo Dale Carothers
DATE
2008
IEEE
197views Hardware» more  DATE 2008»
13 years 11 months ago
Quantitative Productivity Measurement in IC Design
This paper describes ongoing research in the field of quantitative productivity measurement in IC Design and simulation of different scenarios as decision support. Five topics out...
Frank Badstubner, Andreas Vörg