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CHES
2011
Springer
271views Cryptology» more  CHES 2011»
12 years 5 months ago
Modulus Fault Attacks against RSA-CRT Signatures
RSA-CRT fault attacks have been an active research area since their discovery by Boneh, DeMillo and Lipton in 1997. We present alternative key-recovery attacks on RSA-CRT signature...
Eric Brier, David Naccache, Phong Q. Nguyen, Mehdi...
TCAD
2008
114views more  TCAD 2008»
13 years 5 months ago
Test-Quality/Cost Optimization Using Output-Deviation-Based Reordering of Test Patterns
At-speed functional testing, delay testing, and n-detection test sets are being used today to detect deep submicrometer defects. However, the resulting test data volumes are too hi...
Zhanglei Wang, Krishnendu Chakrabarty
ECAI
2010
Springer
13 years 6 months ago
A Fault-model-based Debugging Aid for Data Warehouse Applications
The paper describes a model-based approach to developing a general tool for localizing faults in applications of data warehouse technology. A model of the application is configured...
Peter Struss, Vikas Shivashankar, Mohamed Zahoor
AAAI
1990
13 years 6 months ago
Physical Impossibility Instead of Fault Models
In this paper we describe the concept of physical impossibility as an alternative to the specification of fault models. These axioms can be used to exclude impossible diagnoses si...
Gerhard Friedrich, Georg Gottlob, Wolfgang Nejdl
PTS
2007
102views Hardware» more  PTS 2007»
13 years 6 months ago
Testing and Model-Checking Techniques for Diagnosis
Black-box testing is a popular technique for assessing the quality of a system. However, in case of a test failure, only little information is available to identify the root-cause ...
Maxim Gromov, Tim A. C. Willemse
DAC
2006
ACM
13 years 7 months ago
Systematic software-based self-test for pipelined processors
Software-based self-test (SBST) has recently emerged as an effective methodology for the manufacturing test of processors and other components in systems-on-chip (SoCs). By moving ...
Mihalis Psarakis, Dimitris Gizopoulos, Miltiadis H...
ITC
1991
IEEE
86views Hardware» more  ITC 1991»
13 years 8 months ago
Test Pattern Generation for Realistic Bridge Faults in CMOS ICs
Two approaches have been used to balance the cost of generating e ective tests for ICs and the need to increase the ICs' quality level. The rst approach favorsusing high-leve...
F. Joel Ferguson, Tracy Larrabee
EURODAC
1995
IEEE
137views VHDL» more  EURODAC 1995»
13 years 8 months ago
A formal non-heuristic ATPG approach
This paper presents a formal approach to test combinational circuits. For the sake of explanation we describe the basic algorithms with the help of the stuck–at fault model. Ple...
Manfred Henftling, Hannes C. Wittmann, Kurt Antrei...
CHES
2006
Springer
188views Cryptology» more  CHES 2006»
13 years 8 months ago
A Generalized Method of Differential Fault Attack Against AES Cryptosystem
Abstract. In this paper we describe two differential fault attack techniques against Advanced Encryption Standard (AES). We propose two models for fault occurrence; we could find a...
Amir Moradi, Mohammad T. Manzuri Shalmani, Mahmoud...
ITC
1994
IEEE
90views Hardware» more  ITC 1994»
13 years 9 months ago
Defect Classes - An Overdue Paradigm for CMOS IC
: The IC test industry has struggled .for more than 30years to establish a test approach that would guarantee a low defect level to the customer. Wepropose a comprehensive strategy...
Charles F. Hawkins, Jerry M. Soden, Alan W. Righte...