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FPGA
2004
ACM
101views FPGA» more  FPGA 2004»
12 years 1 months ago
SPFD-based one-to-many rewiring
Katsunori Tanaka, Shigeru Yamashita, Yahiko Kambay...
FPGA
2004
ACM
128views FPGA» more  FPGA 2004»
12 years 1 months ago
Incremental physical resynthesis for timing optimization
This paper presents a new approach to timing optimization for FPGA designs, namely incremental physical resynthesis, to answer the challenge of effectively integrating logic and p...
Peter Suaris, Lung-Tien Liu, Yuzheng Ding, Nan-Chi...
FPGA
2004
ACM
140views FPGA» more  FPGA 2004»
12 years 1 months ago
Using reconfigurability to achieve real-time profiling for hardware/software codesign
Embedded systems combine a processor with dedicated logic to meet design specifications at a reasonable cost. The attempt to amalgamate two distinct design environments introduces...
Lesley Shannon, Paul Chow
FPGA
2004
ACM
98views FPGA» more  FPGA 2004»
12 years 1 months ago
Low-power FPGA using pre-defined dual-Vdd/dual-Vt fabrics
Fei Li, Yan Lin, Lei He, Jason Cong
FPGA
2004
ACM
234views FPGA» more  FPGA 2004»
12 years 1 months ago
An embedded true random number generator for FPGAs
Field Programmable Gate Arrays (FPGAs) are an increasingly popular choice of platform for the implementation of cryptographic systems. Until recently, designers using FPGAs had le...
Paul Kohlbrenner, Kris Gaj
FPGA
2004
ACM
163views FPGA» more  FPGA 2004»
12 years 1 months ago
Time and area efficient pattern matching on FPGAs
Pattern matching for network security and intrusion detection demands exceptionally high performance. Much work has been done in this field, and yet there is still significant roo...
Zachary K. Baker, Viktor K. Prasanna
FPGA
2004
ACM
180views FPGA» more  FPGA 2004»
12 years 2 months ago
A VHDL MPEG-7 shape descriptor extractor
Unlike its predecessors, MPEG-7 standardizes multimedia metadata description. By providing robust descriptors and an effective system for storing them, MPEG-7 is designed to provi...
Bret Woz, Andreas E. Savakis
FPGA
2004
ACM
147views FPGA» more  FPGA 2004»
12 years 2 months ago
The SFRA: a corner-turn FPGA architecture
FPGAs normally operate at whatever clock rate is appropriate for the loaded configuration. When FPGAs are used as computational devices in a larger system, however, it is better ...
Nicholas Weaver, John R. Hauser, John Wawrzynek
FPGA
2004
ACM
133views FPGA» more  FPGA 2004»
12 years 2 months ago
FPGAs vs. CPUs: trends in peak floating-point performance
Moore’s Law states that the number of transistors on a device doubles every two years; however, it is often (mis)quoted based on its impact on CPU performance. This important co...
Keith D. Underwood
FPGA
2004
ACM
121views FPGA» more  FPGA 2004»
12 years 2 months ago
Highly pipelined asynchronous FPGAs
We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and sh...
John Teifel, Rajit Manohar
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