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FPL
2003
Springer
164views Hardware» more  FPL 2003»
13 years 10 months ago
Fast, Large-Scale String Match for a 10Gbps FPGA-Based Network Intrusion Detection System
Intrusion Detection Systems such as Snort scan incoming packets for evidence of security threats. The most computation-intensive part of these systems is a text search against hund...
Ioannis Sourdis, Dionisios N. Pnevmatikatos
FPL
2003
Springer
80views Hardware» more  FPL 2003»
13 years 10 months ago
High-Level Design Tools for FPGA-Based Combinatorial Accelerators
Analysis of different combinatorial search algorithms has shown that they have a set of distinctive features in common. The paper suggests a number of reusable blocks that support ...
Valery Sklyarov, Iouliia Skliarova, Pedro Almeida,...
FPL
2003
Springer
89views Hardware» more  FPL 2003»
13 years 10 months ago
Reconfigurable Systems in Education
This paper describes methods and tools that have been used for teaching disciplines dedicated to the design of reconfigurable digital systems. It demonstrates students' projec...
Valery Sklyarov, Iouliia Skliarova
FPL
2003
Springer
95views Hardware» more  FPL 2003»
13 years 10 months ago
Reconfigurable Hardware SAT Solvers: A Survey of Systems
By adapting to computations that are not so well supported by general-purpose processors, reconfigurable systems achieve significant increases in performance. Such computational sy...
Iouliia Skliarova, António de Brito Ferrari
FPL
2003
Springer
65views Hardware» more  FPL 2003»
13 years 10 months ago
Emulation-Based Analysis of Soft Errors in Deep Sub-micron Circuits
Matteo Sonza Reorda, Massimo Violante
FPL
2003
Springer
81views Hardware» more  FPL 2003»
13 years 10 months ago
A TCP/IP Based Multi-device Programming Circuit
This paper describes a lightweight Field Programmable Gate Array (FPGA) circuit design that supports the simultaneous programming of multiple devices at different locations throug...
David V. Schuehler, Harvey Ku, John W. Lockwood
FPL
2003
Springer
109views Hardware» more  FPL 2003»
13 years 10 months ago
Globally Asynchronous Locally Synchronous FPGA Architectures
Abstract. Globally Asynchronous Locally Synchronous (GALS) Systems have provoked renewed interest over recent years as they have the potential to combine the benefits of asynchron...
Andrew Royal, Peter Y. K. Cheung
FPL
2003
Springer
100views Hardware» more  FPL 2003»
13 years 10 months ago
Two Approaches for a Single-Chip FPGA Implementation of an Encryptor/Decryptor AES Core
In this paper we present a single-chip FPGA full encryptor/decryptor core design of the AES algorithm. Our design performs all of them, encryption, decryption and key scheduling pr...
Nazar A. Saqib, Francisco Rodríguez-Henr&ia...
FPL
2003
Springer
91views Hardware» more  FPL 2003»
13 years 10 months ago
FPGA Implementation of a Maze Routing Accelerator
This paper describes the implementation of the L3 maze routing accelerator in an FPGA. L3 supports fast single-layer and multi-layer routing, preferential routing, and rip-up-and-r...
John A. Nestor
FPL
2003
Springer
76views Hardware» more  FPL 2003»
13 years 10 months ago
Quark Routing
With inherent problem complexity, ever increasing instance size and ever decreasing layout area, there is need in physical design for improved heuristics and algorithms. In this in...
Sean T. McCulloch, James P. Cohoon