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FPL
2008
Springer
143views Hardware» more  FPL 2008»
13 years 6 months ago
Fast toggle rate computation for FPGA circuits
This paper presents a fast and scalable method of computing signal toggle rate in FPGA-based circuits. Our technique is a vectorless estimation technique, which can be used in a C...
Tomasz S. Czajkowski, Stephen Dean Brown
FPL
2008
Springer
91views Hardware» more  FPL 2008»
13 years 6 months ago
Power efficient DSP datapath configuration methodology for FPGA
Exploiting the underutilisation of variable-length DSP algorithms during normal operation is vital, when seeking to maximise the achievable functionality of an application within ...
Stephen McKeown, Roger Woods, John McAllister
FPL
2008
Springer
116views Hardware» more  FPL 2008»
13 years 6 months ago
Shared reconfigurable architectures for CMPS
This paper investigates reconfigurable architectures suitable for chip multiprocessors (CMPs). Prior research has established that augmenting a conventional processor with reconfi...
Matthew A. Watkins, Mark J. Cianchetti, David H. A...
FPL
2008
Springer
175views Hardware» more  FPL 2008»
13 years 6 months ago
File system access from reconfigurable FPGA hardware processes in BORPH
This paper presents the design and implementation of BORPH's kernel file system layer that provides FPGA processes direct access to the general file system. Using a semantics...
Hayden Kwok-Hay So, Robert W. Brodersen