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ICCAD
1997
IEEE
144views Hardware» more  ICCAD 1997»
13 years 9 months ago
Partial scan delay fault testing of asynchronous circuits
Asynchronous circuits operate correctly only under timing assumptions. Hence testing those circuits for delay faults is crucial. This paper describes a three-step method to detect...
Michael Kishinevsky, Alex Kondratyev, Luciano Lava...
ICCAD
1997
IEEE
53views Hardware» more  ICCAD 1997»
13 years 9 months ago
A quantitative approach to functional debugging
We introduce a novel cut-based debugging paradigm. It coordinates design emulation and simulation and enables fast transition from one to another. Emulation or functional implemen...
Darko Kirovski, Miodrag Potkonjak
ICCAD
1997
IEEE
162views Hardware» more  ICCAD 1997»
13 years 9 months ago
Application-driven synthesis of core-based systems
We developed a new hierarchical modular approach for synthesis of area-minimal core-based data-intensive systems. The optimization approach employs a novel global least-constraini...
Darko Kirovski, Chunho Lee, Miodrag Potkonjak, Wil...
ICCAD
1997
IEEE
76views Hardware» more  ICCAD 1997»
13 years 9 months ago
Simulation methods for RF integrated circuits
Abstract — The principles employed in the development of modern RF simulators are introduced and the various techniques currently in use, or expected to be in use in the next few...
Kenneth S. Kundert
ICCAD
1997
IEEE
122views Hardware» more  ICCAD 1997»
13 years 9 months ago
Approximate timing analysis of combinational circuits under the XBD0 model
This paper is concerned with approximate delay computation algorithms for combinational circuits. As a result of intensive research in the early 90’s [3, 8] efficient tools exi...
Yuji Kukimoto, Wilsin Gosti, Alexander Saldanha, R...
ICCAD
1997
IEEE
86views Hardware» more  ICCAD 1997»
13 years 9 months ago
Micro-preemption synthesis: an enabling mechanism for multi-task VLSI systems
- Task preemption is a critical enabling mechanism in multi-task VLSI systems. On preemption, data in the register les must be preserved in order for the task to be resumed. This e...
Kyosun Kim, Ramesh Karri, Miodrag Potkonjak
ICCAD
1997
IEEE
117views Hardware» more  ICCAD 1997»
13 years 9 months ago
Decomposition of timed decision tables and its use in presynthesis optimizations
Presynthesis optimizations transform a behavioral HDL description into an optimized HDL description that results in improved synthesis results. In this paper we introduce the decom...
Jian Li, Rajesh K. Gupta
ICCAD
1997
IEEE
106views Hardware» more  ICCAD 1997»
13 years 9 months ago
Accurate power estimation for large sequential circuits
A power estimation approach is presented in which blocks of consecutive vectors are selected at random from a user-supplied realistic input vector set and the circuit is simulated...
Joseph N. Kozhaya, Farid N. Najm
ICCAD
1997
IEEE
103views Hardware» more  ICCAD 1997»
13 years 9 months ago
Delay bounded buffered tree construction for timing driven floorplanning
Maggie Zhiwei Kang, Wayne Wei-Ming Dai, Tom Dillin...
ICCAD
1997
IEEE
129views Hardware» more  ICCAD 1997»
13 years 9 months ago
A fast and robust exact algorithm for face embedding
We present a new matrix formulation of the face hypercube embedding problem that motivates the design of an efficient search strategy to find an encoding that satisfies all fac...
Evguenii I. Goldberg, Tiziano Villa, Robert K. Bra...