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ICCD
2003
IEEE
113views Hardware» more  ICCD 2003»
12 years 3 months ago
Multiple Transition Model and Enhanced Boundary Scan Architecture to Test Interconnects for Signal Integrity
As the technology is shrinking toward 50 nm and the working frequency is going into multi gigahertz range, the effect of interconnects on functionality and performance of system-o...
Mohammad H. Tehranipour, Nisar Ahmed, Mehrdad Nour...
ICCD
2003
IEEE
143views Hardware» more  ICCD 2003»
12 years 3 months ago
Aggressive Test Power Reduction Through Test Stimuli Transformation
Excessive switching activity during shift cycles in scan-based cores imposes considerable test power challenges. To ensure rapid and reliable test of SOCs, we propose a scan chain...
Ozgur Sinanoglu, Alex Orailoglu
ICCD
2003
IEEE
89views Hardware» more  ICCD 2003»
12 years 3 months ago
Power-Time Tradeoff in Test Scheduling for SoCs
We present a test scheduling methodology for core-based system-on-chips that allows tradeoff between system power dissipation and overall test time. The basic strategy is to use t...
Mehrdad Nourani, James Chin
ICCD
2003
IEEE
104views Hardware» more  ICCD 2003»
12 years 3 months ago
Non-Crossing OBDDs for Mapping to Regular Circuit Structures
In this paper, we propose a novel compact BDD structure, called Non-crossing ordered BDD (NCOBDD), that can be mapped directly to a regular circuit structure. Compared with other ...
Aiqun Cao, Cheng-Kok Koh
ICCD
2003
IEEE
137views Hardware» more  ICCD 2003»
12 years 6 months ago
Dynamic Thread Resizing for Speculative Multithreaded Processors
There is a growing interest in the use of speculative multithreading to speed up the execution of a program. In speculative multithreading model, threads are extracted from a sequ...
Mohamed M. Zahran, Manoj Franklin
ICCD
2003
IEEE
141views Hardware» more  ICCD 2003»
12 years 6 months ago
Structured ASICs: Opportunities and Challenges
There is currently a huge gap between the two main technologies used to implement custom digital integrated circuit (IC) designs. At one end of the spectrum are field programmable...
Behrooz Zahiri
ICCD
2003
IEEE
127views Hardware» more  ICCD 2003»
12 years 6 months ago
Structural Detection of Symmetries in Boolean Functions
Functional symmetries provide significant benefits for multiple tasks in synthesis and verification. Many applications require the manual specification of symmetries using spe...
Guoqiang Wang, Andreas Kuehlmann, Alberto L. Sangi...
ICCD
2003
IEEE
113views Hardware» more  ICCD 2003»
12 years 6 months ago
Exploiting Microarchitectural Redundancy For Defect Tolerance
Continued advancements in fabrication technology and reductions in feature size create challenges in maintaining both manufacturing yield rates and long-term reliability of device...
Premkishore Shivakumar, Stephen W. Keckler, Charle...
ICCD
2003
IEEE
177views Hardware» more  ICCD 2003»
12 years 6 months ago
SAT-Based Algorithms for Logic Minimization
This paper introduces a new method for two-level logic minimization. Unlike previous approaches, the new method uses a SAT solver as an underlying engine. While the overall minimi...
Samir Sapra, Michael Theobald, Edmund M. Clarke
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